MCZ33996EK Freescale, MCZ33996EK Datasheet - Page 15

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MCZ33996EK

Manufacturer Part Number
MCZ33996EK
Description
Manufacturer
Freescale
Datasheet

Specifications of MCZ33996EK

Switch Type
Low Side
Power Switch Family
33996
Input Voltage
-0.3 to 7V
Power Switch On Resistance
550mOhm
Output Current
900mA
Number Of Outputs
16
Mounting
Surface Mount
Supply Current
4mA
Package Type
SOIC W EP
Operating Temperature (min)
-40C
Operating Temperature Classification
Automotive
Pin Count
32
Power Dissipation
1.7W
Lead Free Status / RoHS Status
Compliant

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0
Power Consumption
one Operational mode. In Sleep mode (SO
current consumed by the VPWR pin is less than 10μA. To
place the 33996 in Sleep mode, turn all outputs OFF and
remove power from the SOPWR pin. During normal
operation, 500μA is drawn from the SO
from the V
Paralleling of Outputs
of any combination of outputs together. The R
MOSFETs has an inherent positive temperature coefficient,
providing balanced current sharing between outputs without
destructive operation. This mode of operation may be
desirable in the event the application requires lower power
dissipation or the added capability of switching higher
currents. Performance of parallel operation results in a
corresponding decrease in R
Limit increases correspondingly. Output OFF Open Load
Detect current may increase based on how the Output OFF
Open Load Detect is programmed. Paralleling outputs from
two or more different IC devices is possible but not
recommended.
loads. The Output Voltage Clamp of the output drivers may
not match. One MOSFET output must be capable of the
inductive energy from the load turn OFF.
SPI Integrity Check
recommended upon initial power-up of the SOPWR pin. After
initial system start-up or reset, the MCU writes one 48-bit
pattern to the 33996.
outputs, while the second 24 bits is the first bit pattern sent.
By the MCU receiving the same bit pattern it sent, bus
integrity is confirmed. Please note the second 24 bits the
MCU sends to the 33996 are the command bits and will
program registers or activate outputs on the rising edge of
CS
Output OFF Open Load Fault
reporting of an open load when the corresponding output is
disabled (input bit programmed to a logic low state). The
Output OFF Open Load Fault is detected by comparing the
drain-to-source voltage of the specific MOSFET output to an
internally generated reference. Each output has one
dedicated comparator for this purpose.
source. The pull-down current is disabled on power-up and
must be enabled for Open Load Detect to function. Once
Analog Integrated Circuit Device Data
Freescale Semiconductor
The 33996 has been designed with one Sleep mode and
Using MOSFETs as output switches allows the connection
Care must be taken when paralleling outputs for inductive
Checking the integrity of the SPI communication is
The first 24 bits read by the MCU is the fault status of the
An Output OFF Open Load Fault is the detection and
Each 33996 output has an internal 50μA pull-down current
.
PWR
supply.
DS(ON)
, while the Output Current
PWR
supply and 8.0mA
PWR
TYPICAL APPLICATIONS
DS(ON)
≤ 2.0V) the
of
enabled, the 33996 will only shut down the pull-down current
in Sleep mode or when disabled via the SPI.
a false Output OFF Open Load Fault may be triggered. To
prevent this false fault from being reported, an internal fault
filter of 100 to 450μs is incorporated. The duration for which
a false fault may be reported is a function of the load
impedance, R
supply voltage, V
in fault delay timer. The timer must time out before the fault
comparator is enabled to detect a faulted threshold. Once the
condition causing the Open Load Fault is removed, the
device resumes normal operation. The Open Load Fault,
however, will be latched in the output SO Response register
for the MCU to read.
Shorted Load Fault
output being shorted directly to supply, or by an output
experiencing a current greater than the current limit.
short conditions afford system protection:
in the SO Response register) to logic [1].
Under-voltage Shutdown
shutdown of all outputs and reset of all control registers. The
under-voltage threshold is between 2.0 and 3.0V.
output shutdown and reset. The under-voltage threshold is
between 3.2 and 3.5V. When V
the output may operate per the command word and the status
is reported on SO pin, though this is not guaranteed.
Output Voltage Clamp
clamp to provide fast turn-OFF and transient protection of
each output. Each clamp independently limits the drain-to-
source voltage to 50V. The total energy clamped (E
1. The device’s output current is monitored in an analog
2. With the output in current limit, the drain-to-source
3. The device’s output thermal limit is sensed and when
During output switching, especially with capacitive loads,
A shorted load (over-current) fault can be caused by any
Three safety circuits progressively in operation during load
All three protection schemes set the Fault Status bit (bit 23
An under voltage SO
An under-voltage condition at the VPWR pin results in an
Each output of the 33996 incorporates an internal voltage
fashion using a SENSEFET approach and is current
limited.
voltage will increase. By setting the SFPD bit to 0, the
output will shut down on V
450μs.
attained causes only the specific faulted output to
shutdown. The device remains OFF until cooled. The
device then operates as programmed by the shutdown/
retry bit. The cycle continues until the fault is removed
or the command bit instructs the output OFF.
DS(ON)
PWR
, C
. The rising edge of
OUT
PWR
of the MOSFET, as well as the
condition results in the global
PWR
DS
> 2.7V typical after
is between 5.0 and 3.5V,
TYPICAL APPLICATIONS
CS
triggers the built-
INTRODUCTION
J
) can be
33996
15

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