LM80CIMT-3 National Semiconductor, LM80CIMT-3 Datasheet - Page 25

• Manufacturer Part Number: LM80CIMT-3
• Manufacturer: National Semiconductor

Specifications of LM80CIMT-3

• Watchdog Timer: Yes
• Chip Enable Signals: No
• Package Type: TSSOP
• Operating Supply Voltage (min): 2.8V
• Operating Supply Voltage (max): 5.75V
• Operating Temp Range: -25C to 125C
• Operating Temperature Classification: Commercial
• Power Fail Detection: No
• Mounting: Surface Mount
• Pin Count: 24
• Battery Backup Switching: No
• Manual Reset: No
• Lead Free Status / RoHS Status: Not Compliant

2-3 FAN1 RPM
4-5 FAN2 RPM
4-7 Temp [3:0]
Bit
Bit
0
1
6
7
0
1
2
3
12.8 Fan Divisor Register/RST_OUT/OS—Address 05h
Power on – <7:4> is 0101, and <3:0>is mapped to VID <3:0>
12.9 OS Configuration/Temperature Resolution Register
—Address 06h
Power on default Serial Bus address <7:0> = 0000 0001 bi-
nary
FAN1 Mode Select Read/Write
FAN2 Mode Select Read/Write
Control
Control
OS pin enable
RST enable
OS status
OS Polarity
OS mode select
Temperature
Resolution Control
Name
Name
Read/Write
Read/Write
Read/Write
Read/Write
Read only
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
A one selects the level sensitive input mode while a zero selects Fan count mode for the
FAN1 input pin.
A one selects the level sensitive input mode while a zero selects Fan count mode for the
FAN2 input pin.
FAN1 Speed Control.
<3:2> = 00 - divide by 1;
<3:2> = 01 - divide by 2;
<3:2> = 10 - divide by 4;
<3:2> = 11 - divide by 8.
If level sensitive input is selected: >2< = 1 selects and active-low input (An interrupt will be
generated if the FAN2 input is Low), >2< = 0 selects an active-high input (an interrupt will be
generated if the FAN2 input is High).
FAN2 Speed Control.
<5:4> = 00 - divide by 1;
<5:4> = 01 - divide by 2;
<5:4> = 10 - divide by 4;
<5:4> = 11 - divide by 8.
If level sensitive input is selected: <2> = 1 selects and active-low input (An interrupt will be
generated if the FAN2 input is Low), <2> = 0 selects an active-high input (an interrupt will be
generated if the FAN2 input is High).
A one enables OS mode on the RST_OUT/OS output pin, while Bit 7 of this register is set to
zero. If bits 6 and 7 of this register are set to zero the RST_OUT/OS pin is disabled.
A one sets the RST_OUT/OS pin in the RST mode. In the RST mode, bit 7 of the Fan Divisor/
RST_OUT/OS Register has to be set to one. If bits 6 and 7 of this register are set to zero the
RST_OUT/OS pin is disabled.
Status of the OS.This bit mirrors the state of the RST_OUT/OS pin when in the OS mode.
A zero selects OS to be active-low, while a one selects OS to be active high. OS is an open-
drain output.
A one selects the one time interrupt mode for OS, while a zero selects comparator mode for
OS. (See in Section 7.0)
A zero selects the default 8-bit plus sign resolution temperature conversions while a one
selects 11-bit plus sign resolution temperature conversions. 8-bit plus sign conversions time
is approximately 100 ms, while 11-bit plus sign conversion time is approximately 2 seconds.
The lower nibble (4 LSBs) of the 11-bit plus sign temperature data. <4> = Temp [0] (nibble
LSB, 0.0625°C), <5> = Temp [1], <6> = Temp [2], <7> = Temp 3 (nibble MSB, 0.5°C). For 8-
bit plus sign temperature resolution, <7> = Temp [0] (LSB, 0.5°C) while <4:6> are undefined.
25
Description
Description
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