LM80CIMT-3 National Semiconductor, LM80CIMT-3 Datasheet - Page 17

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LM80CIMT-3

Manufacturer Part Number
LM80CIMT-3
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of LM80CIMT-3

Watchdog Timer
Yes
Chip Enable Signals
No
Package Type
TSSOP
Operating Supply Voltage (min)
2.8V
Operating Supply Voltage (max)
5.75V
Operating Temp Range
-25C to 125C
Operating Temperature Classification
Commercial
Power Fail Detection
No
Mounting
Surface Mount
Pin Count
24
Battery Backup Switching
No
Manual Reset
No
Lead Free Status / RoHS Status
Not Compliant

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7.2 Temperature Interrupts
There are four Value RAM WATCHDOG limits for the Tem-
perature reading that affect the INT and OS outputs of the
LM80. They are: Hot Temperature Limit, Hot Temperature
Hysteresis Limit, OS Limit, OS Hysteresis Limit. There are
three interrupt modes of operation: “One-Time Interrupt”
mode, “Default Interrupt” mode, and “Comparator Mode”. The
OS output of the LM80 can be programmed for “One-Time
Interrupt” mode and “Comparator” mode. INT can be pro-
grammed for “Default Interrupt” mode and “One-Time” Inter-
rupt.
“Default Interrupt mode” operates in the following way: Ex-
ceeding T
initely until reset by reading Interrupt Status Register 1 or
cleared by the INT_Clear bit in the Configuration register.
Once an Interrupt event has occurred by crossing T
reset, an Interrupt will occur again once the next temperature
conversion has completed. The interrupts will continue to oc-
cur in this manner until the temperature goes below T
at which time the Interrupt output will automatically clear.
“One-Time Interrupt” mode operates in the following way:
Exceeding T
definitely until reset by reading Interrupt Status Register 1 or
cleared by the INT_Clear bit in the Configuration register.
Once an Interrupt event has occurred by crossing T
reset, an Interrupt will not occur again until the temperature
goes below T
“Comparator” mode operates in the following way: Exceed-
ing T
remain Low until the temperature goes below T
temperature goes below T
os
causes the OS output to go Low (default). OS will
hot
hot
causes an Interrupt that will remain active indef-
hot hyst
causes an Interrupt that will remain active in-
.
os
, OS will go High.
os
. Once the
hot
hot
hot hyst
, then
, then
,
17
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