CY7C63231A-PC Cypress Semiconductor Corp, CY7C63231A-PC Datasheet - Page 42

• Manufacturer Part Number: CY7C63231A-PC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C63231A-PC

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Lead Free Status / RoHS Status: Not Compliant

22.0
Storage Temperature ..........................................................................................................................................–65°C to +150°C
Ambient Temperature with Power Applied ...............................................................................................................–0°C to +70°C
Supply voltage on V
DC Input Voltage........................................................................................................................................... –0.5V to +V
DC Voltage Applied to Outputs in High Z State............................................................................................ –0.5V to + V
Maximum Total Sink Output Current into Port 0 and 1 and Pins.......................................................................................... 70 mA
Maximum Total Source Output Current into Port 0 and 1 and Pins ..................................................................................... 30 mA
Maximum On-chip Power Dissipation on any GPIO Pin ......................................................................................................50 mW
Power Dissipation ..............................................................................................................................................................300 mW
Static Discharge Voltage ................................................................................................................................................... >2000V
Latch-up Current ............................................................................................................................................................. >200 mA
23.0
F
Document #: 38-08028 Rev. *B
V
V
I
I
I
I
V
T
I
I
I
V
t
V
C
V
V
V
Notes:
10. In suspend mode, V
OSC
CC1
CC2
SB1
SB2
IL
SNK
SRC
VCCS
4.
5.
6.
7.
8.
9.
RSNTR
CC1
CC2
PP
LVR
REG
OHU
OLU
OHZ
REG
Full functionality is guaranteed in V
Bench measurements taken under nominal operating conditions. Spec cannot be guaranteed at final test.
Total current cumulative across all Port pins, limited to minimize Power and Ground-Drop noise effects.
LVR is automatically disabled during suspend mode.
LVR will re-occur whenever V
V
output is not regulated, and should not be used as a general source of regulated voltage in that case. During receive of USB data, the VREG output drops
when D– is LOW due to internal series resistance of approximately 200Ω at the VREG pin.
= 6 MHz; Operating Temperature = 0 to 70°C
RG
specified for regulator enabled, idle conditions (i.e., no USB traffic), with load resistors listed. During USB transmits from the internal SIE, the VREG
Absolute Maximum Ratings
DC Characteristics
Operating Voltage
Operating Voltage
V
Oscillator Mode.
Typical I
V
Oscillator Mode.
Typical I
Standby Current - No Wake-up Osc
Standby Current - With Wake-up Osc
Programming Voltage (disabled)
Resonator Start-up Interval
Input Leakage Current
Max I
Max I
Low-voltage Reset Trip Voltage
V
VREG Regulator Output Voltage
Capacitance on VREG Pin
Static Output High, driven
Static Output Low
Static Output High, idle or suspend
CC
CC
CC
Low-voltage and Power-on Reset
Operating Supply Current - External
Operating Supply Current - Internal
Power-on Slew Time
SS
CC
CC
RG
CC1
CC2
GPIO Sink Current
GPIO Source Current
relative to V
is only valid if R
= 13 mA
= 16 mA
USB Interface
Parameter
CC
General
drops below V
CC1
[5]
[5]
SS
PU
range, except USB transmitter specifications and GPIO output currents are guaranteed for V
.................................................................................................................... –0.5V to +7.0V
is connected from D– to VREG pin, and R
FOR
FOR
LVR
. In suspend or with LVR disabled, BOR occurs whenever V
V
4.35
–0.4
Min
3.5
3.0
2.8
2.7
LVR
Max
5.25
256
300
100
0.4
4.0
3.6
3.6
3.6
5.5
0.3
20
17
25
75
70
30
1
PD
is connected from D– to ground
Units
mA
mA
mA
mA
ms
µA
µA
µA
pF
µs
V
V
V
V
V
V
V
V
V
Load = R
External cap not required
Note 4
Note 4
V
V
V
V
Oscillator off, D– > 2.7V
Oscillator off, D– > 2.7V
V
Any I/O pin
Cumulative across all ports
Cumulative across all ports
linear ramp: 0 to 4V
R
With R
R
D– to VREG pin
CC
CC
CC
CC
CC
CC
PD
PD
connected D– to Gnd, R
= 5.5V, no GPIO loading
= 5.0V. T = Room Temperature
= 5.5V, no GPIO loading
= 5.0V. T = Room Temperature
= 5.0V, ceramic resonator
below V
to Gnd
CC
PU
PU
drops below approximately 2.5V.
to VREG pin
CY7C63221/31A
[4]
enCoRe™ USB
+R
LVR
Conditions
PD
[4]
for >100 ns
[9, 10]
[8]
CC2
range.
[6]
[6]
PU
[7]
Page 42 of 50
connected
CC
CC
+0.5V
+0.5V
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