ISP1581BD STEricsson, ISP1581BD Datasheet - Page 24

• Manufacturer Part Number: ISP1581BD
• Manufacturer: STEricsson

Specifications of ISP1581BD

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Philips Semiconductors
Table 17:
[1]
9397 750 13462
Product data
Bit
Symbol
Reset
Bus reset
Access
Only applicable for control IN/OUT.
Control Function register: bit allocation
R/W
7
-
-
9.3.2 Control Function register (address: 28H)
Table 15:
Table 16:
The Control Function register is used to perform the buffer management on the
endpoints. It consists of 1 byte and the bit configuration is given in
register bits can stall, clear or validate any enabled data endpoint. Before accessing
this register, the Endpoint Index register must be written first to specify the target
endpoint.
reserved
Bit
7 to 6
5
4 to 1
0
Buffer name
SETUP
Data OUT
Data IN
R/W
6
-
-
Addressing of Endpoint 0 buffers
Endpoint Index register: bit description
Symbol
-
EP0SETUP
ENDPIDX[3:0] Endpoint Index: Selects the target endpoint for register access
DIR
R/W
5
-
-
Rev. 06 — 23 December 2004
EP0SETUP
1
0
0
CLBUF
Description
reserved
Selects the SETUP buffer for Endpoint 0:
0 — EP0 data buffer
1 — SETUP buffer.
Must be logic 0 for access to other endpoints than Endpoint 0.
of Buffer Length, Control Function, Data Port, Endpoint Type,
MaxPacketSize and Short Packet.
Direction bit: Sets the target endpoint as IN or OUT endpoint:
0 — target endpoint refers to OUT (RX) FIFO
1 — target endpoint refers to IN (TX) FIFO.
R/W
4
0
0
VENDP
R/W
3
0
0
ENDPIDX
00H
00H
00H
Hi-Speed USB peripheral controller
reserved
R/W
2
-
-
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
STATUS
DIR
0
0
1
R/W
1
0
0
Table
ISP1581
[1]
17.The
STALL
R/W
0
0
0
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