M395T2953EZ4-CE61 Samsung Semiconductor, M395T2953EZ4-CE61 Datasheet - Page 7

• Manufacturer Part Number: M395T2953EZ4-CE61
• Manufacturer: Samsung Semiconductor

Specifications of M395T2953EZ4-CE61

• Lead Free Status / RoHS Status: Compliant

Southbound consists of 10 differential signal pairs (lane), physically 20 signaling line. Southbound Format has 10x12 (10 IO (or Lane) x
12 IO switching) frame format, which deliver 10x12 bit information per one DRAM clock. One south bound frame is divided into three
command slot. See figure 5. Command slot A delivers command (with address). Command slot B and C delivers command (with
address) or write data into DRAM.
2.3 FB-DIMM Clocking Scheme
In FB-DIMM platform design, phase adjustment among reference clock inputs to each individual AMB and host is not taken account.
Thus, clock synchronization is made by using both external reference clock and channel data stream in FB-DIMM memory system. Host
and each individual AMB has a each individual IO basis clock recovery circuitry for channel data communication. It runs with inputs from
PLL inside chip and data stream from the other AMB or Host. Because data stream itself involves data communication process, no sig-
naling switching or data communication may loss clock synchronization between transmitter and receiver. Thus, min transition density is
defined for this purpose. In FBD channel, a density of 6 transitions within 512 transfers or unit intervals (UI) on the channel is required for
interpolator training.
Figure 3 : FB-DIMM Clocking
2.4 FB-DIMM Protocol
FB-DIMM channel has two unidirectional communication paths - south bound and north bound. South bound and north bound use phys-
ically different signal path. South and north mean direction of signal transaction. Southbound means direction of signals running from the
host controller toward the DIMMs. North is the opposite of south. Due to nature of memory operation, southbound carries information
including command to DRAM, address to DRAM and write data to DRAM, while north bound carries read data from DRAM. In channel
protocol point of view, southbound and northbound have different data frame formats and frame format size is optimized to ratio of read
and write. Data transfer perspective, read data transfer rate of north bound is twice faster than write data transfer. Higher channel utiliza-
tion achieves with asymmetric read and write data transfer rate.
Figure 4 : Southbound / Northbound Frame format
FBDIMM
Using Reference CLK (Not in Phase)
Adjust edge/phase by; Min. Transition Density
Reference CLK
Host
Command (with Address)
Command (with Address)
Command (with Address)
Clock
SB (ADDR, CMD, Wdata)
or Write Data in
or Write Data in
Sout bound
NB(Rdata)
Recovery
Clock
Rx
Tx
Clk_Ref
DQs ADDR
A CMD
B CMD
C CMD
DRAM
DRAM
DRAM
DRAM
AMB
CMD
CLK
7 of 33
Tx
Rx
Northbound
R_Data(x72bits)
R_Data(x72bits)
Min. Transition Density
6 Transitions
512 Transfers
Rev. 1.51 January 2008
DDR2 SDRAM