SAA4956TJ/V2,512 NXP Semiconductors, SAA4956TJ/V2,512 Datasheet
SAA4956TJ/V2,512
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SAA4956TJ/V2,512 Summary of contents
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DATA SHEET SAA4956TJ 2.9-Mbit field memory with noise reduction Preliminary specification File under Integrated Circuits, IC02 INTEGRATED CIRCUITS 1998 Dec 08 ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction CONTENTS 1 FEATURES 2 GENERAL DESCRIPTION 3 ORDERING INFORMATION 4 QUICK REFERENCE DATA 5 BLOCK DIAGRAM 6 PINNING 7 FUNCTIONAL DESCRIPTION 7.1 Field memory function 7.1.1 Write operation 7.1.2 Read operation 7.1.3 ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction 1 FEATURES 2949264-bit field memory with optional field based noise reduction 245772 12-bit organization 3.3 V power supply Inputs fully TTL compatible when using an extra 5 V power supply High speed ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction 4 QUICK REFERENCE DATA SYMBOL PARAMETER T SWCK cycle time cy(SWCK) T read cycle time (SRCK) cy(SRCK) t read access time after SRCK ACC V supply voltage (pin 19 supply ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction 5 BLOCK DIAGRAM D0 (V0) to D11 (Y7) handbook, full pagewidth IE NREN DATA INPUT AND WRITE MASK BUFFER ( 13 C-bus control ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction 6 PINNING SYMBOL PIN SCL 1 GND 2 D11 3 (Y7) D10 4 (Y6 (Y5 (Y4 (Y3 (Y2 (Y1 (Y0) ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction handbook, halfpage 1 SCL 2 GND 3 D11 (Y7) 4 D10 (Y6 (Y5 (Y4 (Y3 (Y2 (Y1 (Y0 ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction During this time, control signals WE and IE will function as defined for normal operation. The remaining 12 bits of the 13-bit write block address must be applied, in turn, to the ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction 7.1.2 R EAD OPERATION Read operations are controlled by the SRCK, RSTR, RE and OE signals. A read operation starts with a reset read address pointer (RSTR) operation, followed by a complete ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction 7.1 OWER UP AND INITIALIZATION Reliable operation is not guaranteed until at least 100 s after power-up, the time needed to stabilize V recommended operating range. After the 100 s ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction 7.2 Noise reduction function data input handbook, full pagewidth D0 (V0 (V1) D2 (U0 (U1 C-bus control: chroma_inverted REFORMATTER DPCMin new U/V delta U/V LOW-PASS ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction The main function of the noise reduction is shown in Fig. divided in two signal paths for chrominance and luminance. Two operating modes can be used in principal: the fixed ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction The start position, when the first phase of the YUV data word is expected on the input bus, is defined by the first valid written or read ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction 7.2.5 N OISE SHAPE If the noise shaping is activated possible shadow picture information in the chrominance and the luminance path, resulting from a low K-factor value, will be eliminated. The noise ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction Table 6 Write registers REGISTER BIT NAME Subregister 20H to 23H (Ksteps of the look-up tables of luminance and chrominance) 20H Kstep0 Kstep1 21H 0 to ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction 8 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER V supply voltage (pin 19 supply voltage (pin 22) DD(O) V supply voltage for protection ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction 10 CHARACTERISTICS 3 DD(O) DD(P) SYMBOL PARAMETER Supply V supply voltage (pin 19 supply voltage (pin 22) DD(O) V ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction SYMBOL PARAMETER t set-up time data inputs (D0 to D11) see Fig.4 su(D) t hold time data inputs (D0 to D11) h(D) t set-up time RSTW su(RSTW) t hold time RSTW h(RSTW) ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction N 2 handbook, full pagewidth T cy(SWCK) SWCK t w(SWCKH) t w(SWCKL) RSTW D0 to D11 handbook, full pagewidth cy(SWCK) SWCK t w(SWCKH) t w(SWCKL) ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction start handbook, full pagewidth sequence (4 SWCK SWCK RSTW WE LOW: D0 controlled MSB D1 to D11 Fig.6 D0 controlled entry sequence of the ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction N 1 handbook, full pagewidth SWCK t su(WE D11 RSTW N 1 handbook, full pagewidth SWCK t su(IE D11 RSTW ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction N N handbook, full pagewidth SWCK D11 N N RSTW SRCK OE RE new Q0 to Q11 N RSTR 1998 Dec ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction N 1 handbook, full pagewidth T cy(SRCK) SRCK t w(SRCKH) t w(SRCKL) RSTR t ACC Q0 to Q11 handbook, full pagewidth T cy(SRCK) SRCK t w(SRCKH) t ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction start handbook, full pagewidth sequence (4 SRCK SRCK RSTR RE MSB OE high Q11 Fig.13 Entry sequence of the random read block access mode. N ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction N handbook, full pagewidth SRCK t su(OE Q11 RSTR 1998 Dec 08 disable disable t h(OE) t w(OEL) t dis(Q) high-Z N Fig.15 Read cycle timing ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction handbook, full pagewidth SWCK RSTW WE and D11 SRCK RSTR RE and OE high Q11 1998 Dec new new new 1 2 ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction handbook, full pagewidth SWCK RSTW WE and D11 SRCK RSTR RE and OE high Q11 1998 Dec new new new 1 2 ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction reset handbook, full pagewidth signal serial clock RSTW 16 SWCK 15 D0 (V0) to D11 (Y7) data inputs enable signal write new data handbook, ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction 11 APPLICATION INFORMATION handbook, full pagewidth YIN UIN VIN SCL 1 D11 3 D10 ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction 12 PACKAGE OUTLINE SOJ40: plastic small outline package; 40 leads (J-bent); body width 10. pin 1 index 1 e DIMENSIONS (millimetre dimensions are derived from the original inch dimensions) ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction 13 SOLDERING 13.1 Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction 13.5 Suitability of surface mount IC packages for wave and reflow soldering methods PACKAGE BGA, SQFP HLQFP, HSQFP, HSOP, SMS (3) PLCC , SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction 14 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction 1998 Dec 08 NOTES 34 Preliminary specification SAA4956TJ ...
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Philips Semiconductors 2.9-Mbit field memory with noise reduction 1998 Dec 08 NOTES 35 Preliminary specification SAA4956TJ ...
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Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 160 1010, ...