SGTL5000XNAA3 Freescale, SGTL5000XNAA3 Datasheet - Page 33

• Manufacturer Part Number: SGTL5000XNAA3
• Manufacturer: Freescale

Specifications of SGTL5000XNAA3

• Single Supply Voltage (typ): 1.8/2.5/3.3V
• Lead Free Status / RoHS Status: Compliant

Table 19. CHIP_ADCDAC_CTRL 0x000E
Analog Integrated Circuit Device Data
Freescale Semiconductor
15:14
11:10
BITS
15
7:4
13
12
9
8
3
2
1
0
RSVD
VOL_BUSY_DAC_LEF
VOL_BUSY_DAC_RIG
ADC_HPF_BYPASS
14
DAC_MUTE_RIGHT
ADC_HPF_FREEZE
VOL_EXPO_RAMP
DAC_MUTE_LEFT
VOL_RAMP_EN
FIELD
RSVD
RSVD
RSVD
HT
13
T
12
RW
RW
RW
RW
RW
RW
RW
RW
RO
RO
RO
RO
11
RSVD
RESET
0x0
0x0
0x0
0x0
0x1
0x0
0x0
0x1
0x1
0x0
0x0
10
Reserved
Volume Busy DAC Right
0x0 = Ready
0x1 = Busy - This indicates the channel has not reached its programmed volume/mute
level
Volume Busy DAC Left
0x0 = Ready
0x1 = Busy - This indicates the channel has not reached its programmed volume/mute
level
Reserved
Volume Ramp Enable
0x0 = Disables volume ramp. New volume settings will take immediate effect without
a ramp
0x1 = Enables volume ramp
This field affects DAC_VOL. The volume ramp effects both volume settings and mute.
When set to 1 a soft mute is enabled.
Exponential Volume Ramp Enable
0x0 = Linear ramp over top 4 volume octaves
0x1 = Exponential ramp over full volume range
This bit only takes effect if VOL_RAMP_EN is 1.
Reserved
DAC Right Mute
0x0 = Unmute
0x1 = Muted
If VOL_RAMP_EN = 1, this is a soft mute.
DAC Left Mute
0x0 = Unmute
0x1 = Muted
If VOL_RAMP_EN = 1, this is a soft mute.
ADC High Pass Filter Freeze
0x0 = Normal operation
0x1 = Freeze the ADC high-pass filter offset register. The offset will continue to be
subtracted from the ADC data stream.
ADC High Pass Filter Bypass
0x0 = Normal operation
0x1 = Bypassed and offset not updated
9
8
7
6
RSVD
DEFINITION
5
4
FUNCTIONAL DEVICE OPERATION
3
PROGRAMMING EXAMPLES
2
1
SGTL5000
0
33