TDA8501T/N1,118 NXP Semiconductors, TDA8501T/N1,118 Datasheet - Page 15

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TDA8501T/N1,118

Manufacturer Part Number
TDA8501T/N1,118
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of TDA8501T/N1,118

Lead Free Status / RoHS Status
Compliant
Philips Semiconductors
AC CHARACTERISTICS
V
April 1993
Encoder circuit
Input stage (pins 1, 3, 5, 7, 9 and 11); black level = clamping level
V
V
I
V
G
MCONTROL (pin 2; note 1)
V
V
I
t
U modulator offset control (pin 6)
V
I
V
V
V modulator offset control (pin 12)
V
I
V
V
Y
R
I
I
V
SYMBOL
bias
I
sw
LI
LI
sink
source
CC
Z
n(max)
n(min)
I
IL
IH
6
LL
HL
12
LL
HL
BL
O
PAL/NTSC encoder
I
= 5 V; T
SYNC (pin 22 out to delay circuit)
amb
maximum signal
input bias current
input voltage clamped
input clamping impedance
matrix and gain tolerance of R, G
and B signals
gain tolerance of Y, (R Y) and
LOW level input voltage
Y, (R Y) and (B Y)
HIGH level input voltage
R, G and B
input current
switching time
DC voltage control level
input leakage current
limited level voltage LOW
limited level voltage HIGH
DC voltage control level
input leakage current
limited level voltage LOW
limited level voltage HIGH
output resistance
maximum sink current
maximum source current
black level output voltage
(B Y)
from black level positive
from black level negative
= 25 C; composite sync signal connected to pin 24; unless otherwise specified.
PARAMETER
only pins 1, 3 and 5
V
input capacitor
connected to ground
I
I
I
= V
I
O
= 1 mA
CONDITIONS
= 1 mA
13
15
tbf
0
1
350
1000
MIN.
1.2
0.9
V
80
80
50
2.5
1.8
3.2
2.5
1.8
3.2
2.5
13
TYP.
Preliminary specification
tbf
0.4
5
100
100
MAX.
3
1
5
5
25
TDA8501
V
V
V
%
%
V
V
ns
V
nA
V
V
V
nA
V
V
V
A
A
A
A
UNIT

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