ADV7314KST Analog Devices Inc, ADV7314KST Datasheet - Page 69

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ADV7314KST

Manufacturer Part Number
ADV7314KST
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADV7314KST

Number Of Dac's
6
Adc/dac Resolution
14b
Screening Level
Commercial
Package Type
LQFP
Pin Count
64
Lead Free Status / RoHS Status
Compliant

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Mode 1—Master Option
(Timing Register 0 TR0 = X X X X X 0 1 1)
In this mode, the ADV7314 can generate horizontal sync and odd/
even field signals. A transition of the field input when HSYNC is
low indicates a new frame i.e., vertical retrace. The BLANK
signal is optional. When the BLANK input is disabled, the
ADV7314 automatically blanks all normally blank lines as per
CCIR-624. Pixel data is latched on the rising clock edge following
the timing signal transitions. HSYNC is output on the S_HSYNC,
BLANK on S_BLANK, and FIELD on S_VSYNC.
REV. 0
HSYNC
BLANK
HSYNC
BLANK
FIELD
FIELD
622
309
DISPLAY
DISPLAY
HSYNC
BLANK
PIXEL
FIELD
DATA
623
310
Figure 83. SD Timing Mode 1—Odd/Even Field Transitions Master/Slave
624
311
EVEN FIELD
ODD FIELD
NTSC = 16
PAL = 12
625
312
CLOCK/2
ODD FIELD
EVEN FIELD
CLOCK/2
313
1
Figure 82. SD Slave Mode 1 (PAL)
314
2
315
3
VERTICAL BLANK
VERTICAL BLANK
–69–
316
4
317
5
318
6
319
7
NTSC = 122
PAL = 132
320
Cb
CLOCK/2
CLOCK/2
21
Y
22
334
Cr
Y
DISPLAY
335
23
ADV7314
DISPLAY
336

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