TMC22151KHC Fairchild Semiconductor, TMC22151KHC Datasheet - Page 56

• Manufacturer Part Number: TMC22151KHC
• Manufacturer: Fairchild Semiconductor

Specifications of TMC22151KHC

• Screening Level: Commercial
• Package Type: MQFP
• Pin Count: 100
• Lead Free Status / RoHS Status: Compliant

TMC22x5y
Y Offset
The 8 bit Y offset adds any offset required in the Y or RGB
data outputs. For example 64 (16) for the 64 (16) to 940
(235) 10 bit (8 bit) 601 outputs. When the output is YC
this offset is applied to the luminance data only. The Y offset
also provides the blanking level for RGB
outputs with syncs.
Matrix Limiters
The different limiters are listed below, 10 bit data is
assumed.
Table 13. Matrix Limiters
Examples of Output Matrix Operation
From the SMPTE-170M specification:
YC
Matrix programming:
56
Magenta
LMT
Yellow
Green
Color
White
Cyan
B
00
01
10
11
Magenta
C
Yellow
Green
Color
White
Black
1-0
Cyan
R
C
YGx = (876 / 540) = 1 + (159/256)
UGx = (448 / 236) = 1 + (230/256)
VGx = (448 / 332) = 1 + (89/256)
YOFF = 64
PED = 44
Y data range is 64 to 940 (876)
Blue
Red
B
data ranges are:
C
R
RGB output format, limited from 0 to 1023
YC
1023 and C
RGB output format, limited from 64 to 940
YC
940 and C
data ranges are 64 to 960 (+/- 448)
939
841
678
578
426
Decoder Output
Y
B
B
C
C
R
R
-448
-296
output format, Y limited from 0 to
output format, Y limited from 64 to
150
296
C
0
584
523
423
361
267
205
105
B
B
44
Y
B
C
C
R
R
-447
-376
Comments
376
limited to +/- 448
C
73
0
limited to +/- 511.
R
-236
-156
156
236
940
840
678
578
426
-79
79
U
CCIR 601 Spec
0
0
Y
-448
-296
151
296
C
0
B
-332
-278
278
332
-54
54
V
0
0
-448
-375
375
C
72
B
0
R
C
R
PAL digital composite input and RGB (0-1023) outputs:
The nominal scaling factors are simply:
It is also possible with the architecture supplied to use the
limiters on the output of the matrix to clip the output video
deliberately by using a slightly larger gain than is required.
The Y_Offset can achieve the same by setting its value to be
one lsb less than the minimum clip level.
Buffer Registers
The BUFFER pin allows the user to externally switch
between two sets of internal registers that have the same
function. This register buffering allows the matrix gain,
picture hue, and luma offset to be changed at a known time
relative to the input data.
Registers 17 to 1D are selected when the BUFFER pin is
LOW and registers 27 to 2D are selected when the BUFFER
pin is HIGH. If the msb of the decoder product code DPC
LOW, an 8 bit decoder has been selected and the bottom 2
bits of registers 17 to 1A and 27 to 2A are forced to zero.
Color
Black
Magenta
Blue
Magenta
Red
Yellow
Green
Yellow
Green
Color
Color
White
White
Black
Black
Cyan
Cyan
Blue
Blue
Red
Red
YGx = 1023/572 = 1 + (202/256)
UGx = (1023/572)*(1/0.492) = 3 + (163/256)
VGx = (1023/572)*(1/0.877) = 2 + (10/256)
YOFF= 0
PED = 0
325
163
Decoder Output
64
Y
1023
1023
1023
1023
-150
448
C
572
507
401
336
236
171
65
G
0
0
0
0
0
Y
0
B
447
-73
C
0
R
PRODUCT SPECIFICATION
1023
1023
1023
1023
-250
-165
165
250
-84
84
326
164
R
U
0
0
0
0
0
0
64
CCIR 601 Spec
Y
-151
C
448
0
B
1023
1023
1022
1023
-352
-295
295
352
-57
57
V
B
0
0
0
1
1
0
448
-72
C
0
R
2
is