SC16C852LIB NXP Semiconductors, SC16C852LIB Datasheet - Page 38

• Manufacturer Part Number: SC16C852LIB
• Manufacturer: NXP Semiconductors

Specifications of SC16C852LIB

• Transmitter And Receiver Fifo Counter: Yes
• Data Rate: 5Mbps
• Package Type: LQFP
• Mounting: Surface Mount
• Pin Count: 48
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Number Of Channels: 2
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
SC16C852L
Product data sheet
7.17 Flow Control Trigger Level High (FLWCNTH)
7.18 Flow Control Trigger Level Low (FLWCNTL)
7.19 Clock Prescaler (CLKPRES)
[1]
This 8-bit register is used to store the receive FIFO high threshold levels to start/stop
transmission during hardware/software flow control.
bit settings; see
Table 29.
[1]
This 8-bit register is used to store the receive FIFO low threshold levels to start/stop
transmission during hardware/software flow control.
bit settings; see
Table 30.
[1]
This register hold values for the clock prescaler.
Table 31.
Bit
7:0
Bit
7:0
Bit
7:4
3:0
For 32-byte FIFO mode, refer to
For 32-byte FIFO mode, refer to
For 32-byte FIFO mode, refer to
FLWCNTH[7:0]
FLWCNTL[7:0]
Symbol
Symbol
Symbol
CLKPRES[7:4]
CLKPRES[3:0]
FLWCNTH register bits description
FLWCNTL register bits description
Clock Prescaler register bits description
All information provided in this document is subject to legal disclaimers.
Section
Section
1.8 V dual UART with 128-byte FIFOs and IrDA encoder/decoder
Rev. 4 — 1 February 2011
6.5.
6.5.
This register stores the programmable HIGH threshold level for
This register stores the programmable LOW threshold level for
reserved
Clock Prescaler value. Reset to 0.
Description
hardware and software flow control for 128-byte FIFO mode
Description
hardware and software flow control for 128-byte FIFO mode
Description
0x00 = trigger level is set to 1
0x01 = trigger level is set to 1
...
0x80 = trigger level is set to 128
0x00 = trigger level is set to 1
0x01 = trigger level is set to 1
...
0x80 = trigger level is set to 128
Section
Section
Section
7.3.
7.3.
7.3.
Table 29
Table 30
shows FLWCNTH register
shows FLWCNTL register
SC16C852L
© NXP B.V. 2011. All rights reserved.
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