SC16C852LIB NXP Semiconductors, SC16C852LIB Datasheet - Page 32

• Manufacturer Part Number: SC16C852LIB
• Manufacturer: NXP Semiconductors

Specifications of SC16C852LIB

• Transmitter And Receiver Fifo Counter: Yes
• Data Rate: 5Mbps
• Package Type: LQFP
• Mounting: Surface Mount
• Pin Count: 48
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Number Of Channels: 2
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
SC16C852L
Product data sheet
7.6 Modem Control Register (MCR)
This register controls the interface with the modem or a peripheral device.
Table 21.
Bit
7
6
5
4
3
2
0
1
Symbol
MCR[7]
MCR[6]
MCR[5]
MCR[4]
MCR[3]
MCR[2]
MCR[1]
MCR[0]
Modem Control Register bits description
All information provided in this document is subject to legal disclaimers.
Description
Clock select
IR enable (see
Reserved; set to ‘0’.
Loopback. Enable the local loopback mode (diagnostics). In this mode the
transmitter output (TXA/TXB) and the receiver input (RXA/RXB), CTS, DSR,
CD, and RI are disconnected from the SC16C852L I/O pins. Internally the
modem data and control pins are connected into a loopback data
configuration (see
interrupts remain fully operational. The Modem Control Interrupts are also
operational, but the interrupts’ sources are switched to the lower four bits of
the Modem Control. Interrupts continue to be controlled by the IER register.
OP2A/OP2B, INT enable
Remark: OP2A/OP2B pins do not exist on the HVQFN32 package.
OP1A/OP1B are not available as an external signal in the SC16C852L. This
bit is instead used in the Loopback mode only. In the Loopback mode, this
bit is used to write the state of the modem RI interface signal.
RTS
DTR
1.8 V dual UART with 128-byte FIFOs and IrDA encoder/decoder
Rev. 4 — 1 February 2011
logic 0 = divide-by-1 clock input
logic 1 = divide-by-4 clock input
logic 0 = enable the standard modem receive and transmit input/output
interface (normal default condition)
logic 1 = enable infrared IrDA receive and transmit inputs/outputs. While
in this mode, the TX/RX output/inputs are routed to the infrared
encoder/decoder. The data input and output levels will conform to the
IrDA infrared interface requirement. As such, while in this mode, the
infrared TX output will be a logic 0 during idle data conditions.
logic 0 = disable Loopback mode (normal default condition)
logic 1 = enable local Loopback mode (diagnostics)
logic 0 = forces INTA/INTB outputs to the 3-state mode and sets
OP2A/OP2B to a logic 1 (normal default condition)
logic 1 = forces the INTA/INTB outputs to the active mode and sets
OP2A/OP2B to a logic 0
logic 0 = force RTSx output to a logic 1 (normal default condition)
logic 1 = force RTSx output to a logic 0
logic 0 = force DTRx output to a logic 1 (normal default condition)
logic 1 = force DTRx output to a logic 0
Figure
Figure
31).
10). In this mode, the receiver and transmitter
SC16C852L
© NXP B.V. 2011. All rights reserved.
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