PIC18LF6723T-I/PT Microchip Technology, PIC18LF6723T-I/PT Datasheet - Page 29

• Manufacturer Part Number: PIC18LF6723T-I/PT
• Description: PIC18 With 128KB Flash, 4KB RAM, 1024 DataEE, 12-bit ADC 64 TQFP 10x10x1mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF6723T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PIC18LF6723T-I/PTTR

5.0
The PIC18F872X family of devices has several
Configuration Words. These bits can be set or cleared
to select various device configurations. All other
memory areas should be programmed and verified
prior to setting the Configuration Words. These bits
may be read out normally, even after read or code
protection. See Table 5-1 for a list of Configuration bits
and device IDs, and Table 5-3 for the Configuration bit
descriptions.
TABLE 5-1:
© 2009 Microchip Technology Inc.
300001h
300002h
300003h
300004h
300005h
300006h
300008h
300009h
30000Ah
30000Bh
30000Ch
30000Dh
3FFFFEh
3FFFFFh
Legend:
Note
File Name
1:
2:
3:
4:
5:
6:
CONFIGURATION WORD
CONFIG1H
CONFIG2L
CONFIG2H
CONFIG3L
CONFIG3H
CONFIG4L
CONFIG5L
CONFIG5H
CONFIG6L
CONFIG6H
CONFIG7L
CONFIG7H
DEVID1
DEVID2
x = unknown, u = unchanged, — = unimplemented, q = value depends on condition.
Shaded cells are unimplemented, read as ‘0’.
Unimplemented in PIC18F6527/6622/6627/8527/8622/8627 devices.
Unimplemented in PIC18F6527/6622/8527/8622 devices.
Unimplemented in PIC18F6527/8527 devices.
See Register 25-13 in the PIC18F872X Family Data Sheet for DEVID1 values. DEVID registers are read-only and can not be
programmed by the user.
Implemented in 80-pin devices only. On 64-pin devices, these bits are reserved and should always be maintained as ‘1’.
It is recommended to enable the corresponding CPx bit to protect blocks from external read operations.
(4)
(4)
CONFIGURATION BITS AND DEVICE IDs
(5)
EBRT7
WRT7
MCLRE
DEBUG
DEV10
WRTD
CP7
DEV2
WAIT
IESO
Bit 7
CPD
—
—
—
(1)
(1,6)
(1)
EBRT6
WRT6
FCMEN
EBTRB
XINST
WRTB
CP6
DEV1
DEV9
Bit 6
CPB
BW
—
—
—
(1)
(1,6)
(1)
EBTR5
WRT5
BBSIZ1
WRTC
ABW1
CP5
DEV0
DEV8
Bit 5
—
—
—
—
—
—
(2)
(2,6)
(2)
EBTR4
WDTPS3
WRT4
BBSIZ0
BORV1
CP4
ABW0
REV4
DEV7
Bit 4
—
—
—
—
—
(2)
(2,6)
(2)
EBTR3
WDTPS2
WRT3
FOSC3
BORV0
5.1
A user may store identification information (ID) in eight
ID locations, mapped in 200000h:200007h. It is recom-
mended that the Most Significant nibble of each ID be
Fh. In doing so, if the user code inadvertently tries to
execute from the ID space, the ID data will execute as
a NOP.
CP3
REV3
DEV6
PIC18F872X FAMILY
Bit 3
—
—
—
—
—
—
(3)
(3,6)
(3)
ID Locations
LPT1OSC ECCPMX
BOREN1
WDTPS1
EBTR2
FOSC2
WRT2
REV2
DEV5
Bit 2
CP2
LVP
—
—
—
—
(6)
EBTR1
BOREN0
WDTPS0
FOSC1
PM1
WRT1
REV1
DEV4
Bit 1
CP1
—
—
—
—
(5)
(6)
(5)
PWRTEN
CCP2MX
EBTR0
STVREN
WDTEN
FOSC0
PM0
WRT0
REV0
DEV3
Bit 0
CP0
—
—
—
(5)
(6)
DS39643C-page 29
Unprogrammed
00-- 0111
---1 1111
---1 1111
1111 --11
1--- -011
1000 -1-1
1111 1111
11-- ----
1111 1111
111- ----
1111 1111
-1-- ----
xxxx xxxx
xxxx xxxx
Default/
Value