PIC18F67J93T-I/PT Microchip Technology, PIC18F67J93T-I/PT Datasheet - Page 32

• Manufacturer Part Number: PIC18F67J93T-I/PT
• Description: Segmented LCD, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC 64 TQFP 10x10x1mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F67J93T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Ram Size: 3923 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3923 B
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F87J93 FAMILY
The analog reference voltage is software selectable to
either the device’s positive and negative supply voltage
(AV
V
The A/D converter has a unique feature of being able
to operate while the device is in Sleep mode. To
operate in Sleep, the A/D conversion clock must be
derived from the A/D’s internal RC oscillator.
The output of the sample and hold is the input into the
converter, which generates the result via successive
approximation.
Each port pin associated with the A/D converter can be
configured as an analog input or as a digital I/O. The
ADRESH and ADRESL registers contain the result of the
FIGURE 2-1:
DS39948A-page 30
REF
DD
+ and RA2/AN2/V
Note 1: Channels AN15 through AN12 are not available on PIC18F6XJ93 devices.
and AV
2: I/O pins have diode protection to V
SS
Converter
12-Bit
) or the voltage level on the RA3/AN3/
A/D
Reference
Voltage
A/D BLOCK DIAGRAM
REF
- pins.
V
V
REF
REF
+
-
(Input Voltage)
VCFG<1:0>
V
(1,2)
AIN
Preliminary
DD
and V
AV
SS
DD
.
A/D conversion. When the A/D conversion is complete,
the result is loaded into the ADRESH:ADRESL register
pair, the GO/DONE bit (ADCON0<1>) is cleared and the
A/D Interrupt Flag bit, ADIF, is set.
A device Reset forces all registers to their Reset state.
This forces the A/D module to be turned off and any
conversion in progress is aborted. The value in the
ADRESH:ADRESL register pair is not modified for a
Power-on Reset. These registers will contain unknown
data after a Power-on Reset.
The block diagram of the A/D module is shown in
Figure 2-1.
AV
SS
CHS<3:0>
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000
© 2009 Microchip Technology Inc.
AN11
AN10
AN9
AN8
AN7
AN6
AN5
AN4
AN3
AN2
AN1
AN0