PIC18F67J93T-I/PT Microchip Technology, PIC18F67J93T-I/PT Datasheet - Page 30

• Manufacturer Part Number: PIC18F67J93T-I/PT
• Description: Segmented LCD, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC 64 TQFP 10x10x1mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F67J93T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Ram Size: 3923 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3923 B
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F87J93 FAMILY
REGISTER 2-2:
bit 7
bit 6
bit 5
bit 4
bit 3-0
DS39948A-page 28
bit 7
Legend:
R = Readable bit
-n = Value at POR
TRIGSEL
R/W-0
TRIGSEL: Special Trigger Select bit
1 = Selects the special trigger from the CTMU
0 = Selects the special trigger from the CCP2
Unimplemented: Read as ‘0’
VCFG1: Voltage Reference Configuration bit (V
1 = V
0 = AV
VCFG0: Voltage Reference Configuration bit (V
1 = V
0 = AV
PCFG<3:0>: A/D Port Configuration Control bits:
A = Analog input
PCFG<3:0> AN11 AN10 AN9
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
U-0
—
REF
REF
ADCON1: A/D CONTROL REGISTER 1
SS
DD
- (AN2)
+ (AN3)
W = Writable bit
‘1’ = Bit is set
A
A
A
A
D
D
D
D
D
D
D
D
D
D
D
D
VCFG1
R/W-0
A
A
A
A
A
D
D
D
D
D
D
D
D
D
D
D
A
A
A
A
A
A
D
D
D
D
D
D
D
D
D
D
VCFG0
R/W-0
Preliminary
AN8
A
A
A
A
A
A
A
D
D
D
D
D
D
D
D
D
D = Digital I/O
AN7
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
A
A
A
A
A
A
A
A
D
D
D
D
D
D
D
D
PCFG3
REF
REF
R/W-0
- source)
+ source)
AN6
D
D
D
D
D
D
D
A
A
A
A
A
A
A
A
A
AN5
A
A
A
A
A
A
A
A
A
A
D
D
D
D
D
D
PCFG2
R/W-0
AN4
D
D
D
D
D
A
A
A
A
A
A
A
A
A
A
A
© 2009 Microchip Technology Inc.
AN3
x = Bit is unknown
A
A
A
A
A
A
A
A
A
A
A
A
D
D
D
D
PCFG1
R/W-0
AN2
A
A
A
A
A
A
A
A
A
A
A
A
A
D
D
D
AN1
A
A
A
A
A
A
A
A
A
A
A
A
A
A
D
D
PCFG0
R/W-0
AN0
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
D
bit 0