PIC16F721T-I/SS Microchip Technology, PIC16F721T-I/SS Datasheet - Page 36

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PIC16F721T-I/SS

Manufacturer Part Number
PIC16F721T-I/SS
Description
7 KB FLASH, 256 B SRAM, 18 I/O 20 SSOP .209in T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet

Specifications of PIC16F721T-I/SS

Core Processor
PIC
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16F/LF720/721
TABLE 3-7:
TABLE 3-8:
DS41430A-page 36
Power-on Reset
MCLR Reset during normal operation
MCLR Reset during Sleep
WDT Reset
WDT Wake-up
Brown-out Reset
Interrupt Wake-up from Sleep
Legend: u = unchanged, x = unknown,
Note 1:
STATUS
PCON
Legend: u = unchanged, x = unknown, - = unimplemented bit, reads as ‘0’, q = value depends on condition.
Note 1:
Name
When the wake-up is due to an interrupt and Global Interrupt Enable bit (GIE) is set, the PC is loaded with
the interrupt vector (0004h) after execution of PC + 1.
Shaded cells are not used by Resets.
Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation.
Bit 7
IRP
Condition
INITIALIZATION CONDITION FOR SPECIAL REGISTERS
SUMMARY OF REGISTERS ASSOCIATED WITH RESETS
Bit 6
RP1
Bit 5
RP0
-
Bit 4
TO
= unimplemented bit, reads as ‘0’.
Program
PC + 1
Counter
PC + 1
Bit 3
0000h
0000h
0000h
0000h
0000h
PD
(1)
Bit 2
Z
Bit 1
POR
DC
0001 1xxx
000u uuuu
0001 0uuu
0000 uuuu
uuu0 0uuu
0001 1xxx
uuu1 0uuu
Register
STATUS
Bit 0
BOR
C
 2010 Microchip Technology Inc.
0001 1xxx
---- --qq
POR, BOR
Value on
---- --0x
---- --uu
---- --uu
---- --uu
---- --uu
---- --10
---- --uu
Register
PCON
000q quuu
---- --uu
Resets
Value on
all other
(1)

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