PIC16F721T-I/SO Microchip Technology, PIC16F721T-I/SO Datasheet - Page 37

• Manufacturer Part Number: PIC16F721T-I/SO
• Description: 7 KB FLASH, 256 B SRAM, 18 I/O 20 SOIC .300in T/R
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F721T-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.0
The PIC16F/LF720/721 device family features an
interruptible core, allowing certain events to preempt
normal program flow. An Interrupt Service Routine
(ISR) is used to determine the source of the interrupt
and act accordingly. Some interrupts can be configured
to wake the MCU from Sleep mode.
FIGURE 4-1:
 2010 Microchip Technology Inc.
IOC-RB4
IOC-RB5
IOC-RB6
IOC-RB7
IOC-RA0
IOC-RA1
IOC-RA2
IOC-RA3
IOC-RA4
IOC-RA5
IOCB4
IOCB5
IOCB6
IOCB7
IOCA0
IOCA1
IOCA2
IOCA3
IOCA4
IOCA5
INTERRUPTS
INTERRUPT LOGIC
TMR1GIE
TMR1GIF
TMR2IE
TMR1IF
TMR1IE
TMR2IF
CCP1IF
CCP1IE
SSPIF
SSPIE
RCIE
RCIF
ADIF
ADIE
TXIF
TXIE
The PIC16F/LF720/721 device family has 12 interrupt
sources, differentiated by corresponding interrupt
enable and flag bits:
• Timer0 Overflow Interrupt
• External Edge Detect on INT Pin Interrupt
• PORTA and PORTB Change Interrupt
• Timer1 Gate Interrupt
• A/D Conversion Complete Interrupt
• AUSART Receive Interrupt
• AUSART Transmit Interrupt
• SSP Event Interrupt
• CCP1 Event Interrupt
• Timer2 Match with PR2 Interrupt
• Timer1 Overflow Interrupt
A block diagram of the interrupt logic is shown in
Figure
Note 1:
4-1.
PIC16F/LF720/721
TMR0IF
TMR0IE
RABIF
RABIE
INTF
INTE
PEIE
GIE
Some peripherals depend upon the
system clock for operation. Since the
system clock is suspended during
Sleep, these peripherals will not wake
the part from Sleep. See
“Wake-up from
Wake-up (if in Sleep mode)
Sleep”.
Interrupt to CPU
DS41430A-page 37
Section 19.1
(1)