PIC16F721-E/SS Microchip Technology, PIC16F721-E/SS Datasheet - Page 74

• Manufacturer Part Number: PIC16F721-E/SS
• Description: 7 KB FLASH, 256 B SRAM, 18 I/O 20 SSOP .209in TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F721-E/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16F/LF720/721
REGISTER 8-1:
DS41430A-page 74
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 13
bit 12
bit 11-10
bit 9-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1-0
Note 1: The Configuration bit is managed automatically by the device development tools. The user should not attempt to manu-
2: Fixed Voltage Reference is automatically enabled whenever the BOR is enabled.
U-1
—
—
ally write this bit location. However, the user should ensure that this location has been programmed to a ‘1’ and the device
checksum is correct for proper operation of production software.
DEBUG
0 =
1 =
PLLEN: INTOSC PLL Enable bit
0 =
1 =
Unimplemented: Read as ‘1’
BOREN<1:0>: Brown-out Reset Enable bits
0x = Brown-out Reset disabled
10 = Brown-out Reset enabled during operation and disabled in Sleep
11 = Brown-out Reset enabled
Unimplemented: Read as ‘1’
CP: Flash Program Memory Code Protection bit
PIC16F720/721
0 =
1 =
MCLRE: RA3/MCLR/V
1 =
0 =
PWRTE: Power-up Timer Enable bit
0 =
1 =
WDTEN: Watchdog Timer Enable bit
0 =
1 =
Unimplemented: Read as ‘1’
FOSC<1:0>: Oscillator Selection bits
11 = EC oscillator: CLKOUT function on RA4/CLKOUT pin, CLKIN on RA5/CLKIN
10 = EC oscillator: I/O function on RA4/CLKOUT pin, CLKIN on RA5/CLKIN
01 = INTOSC oscillator: CLKOUT function on RA4/CLKOUT pin, I/O function on RA5/CLKIN
00 = INTOSCIO oscillator: I/O function on RA4/CLKOUT pin, I/O function on RA5/CLKIN
R/P-1
CP
Background debugger is enabled
Background debugger is disabled
INTOSC frequency is 500 kHz
INTOSC frequency is 16 MHz (32x)
0000h to 07FFh/0FFFh code protection on
Code protection off
RA3/MCLR/V
RA3/MCLR/V
PWRT enabled
PWRT disabled
WDT disabled
WDT enabled
—
CONFIGURATION WORD 1
(1)
: Debugger Mode bit
P = Programmable bit
W = Writable bit
‘1’ = Bit is set
DEBUG
PP
PP
MCLRE
R/P-1
R/P-1
pin function is MCLR; Weak pull-up enabled.
pin function is digital input; MCLR internally disabled; Weak pull-up disabled
PP
Pin Function Select bit
(1)
PWRTE
PLLEN
R/P-1
R/P-1
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
WDTEN
R/P-1
U-1
—
U-1
U-1
—
—
 2010 Microchip Technology Inc.
x = Bit is unknown
BOREN1
FOSC1
R/P-1
R/P-1
BOREN0
FOSC0
R/P-1
R/P-1
bit 8
bit 0