PIC16F1828T-I/SO Microchip Technology, PIC16F1828T-I/SO Datasheet - Page 346
![7 KB Flash, 256 Bytes RAM, 32 MHz Int. Osc, 18 I/0, Enhanced Mid Range Core 20 S](/photos/28/72/287224/20-soic_sot163-1_sml.jpg)
PIC16F1828T-I/SO
Manufacturer Part Number
PIC16F1828T-I/SO
Description
7 KB Flash, 256 Bytes RAM, 32 MHz Int. Osc, 18 I/0, Enhanced Mid Range Core 20 S
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC16F1824-ISL.pdf
(2 pages)
3.PIC16F1824-ISL.pdf
(419 pages)
4.PIC16F1824-ISL.pdf
(10 pages)
Specifications of PIC16F1828T-I/SO
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (0.300", 7.50mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F722-ISS PDF datasheet
- PIC16F1824-ISL PDF datasheet #2
- PIC16F1824-ISL PDF datasheet #3
- PIC16F1824-ISL PDF datasheet #4
- Current page: 346 of 419
- Download datasheet (4Mb)
LSLF
Syntax:
Operands:
Operation:
Status Affected:
Description:
LSRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
2010 Microchip Technology Inc.
Logical Left Shift
[ label ] LSLF
0 f 127
d [0,1]
(f<7>) C
(f<6:0>) dest<7:1>
0 dest<0>
C, Z
The contents of register ‘f’ are shifted
one bit to the left through the Carry flag.
A ‘0’ is shifted into the LSb. If ‘d’ is ‘0’,
the result is placed in W. If ‘d’ is ‘1’, the
result is stored back in register ‘f’.
Logical Right Shift
[ label ] LSLF
0 f 127
d [0,1]
0 dest<7>
(f<7:1>) dest<6:0>,
(f<0>) C,
C, Z
The contents of register ‘f’ are shifted
one bit to the right through the Carry
flag. A ‘0’ is shifted into the MSb. If ‘d’ is
‘0’, the result is placed in W. If ‘d’ is ‘1’,
the result is stored back in register ‘f’.
0
C
register f
f {,d}
f {,d}
register f
C
Preliminary
0
MOVF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Words:
Cycles:
Example:
PIC16(L)F1824/1828
Move f
[ label ]
0 f 127
d [0,1]
(f) (dest)
Z
The contents of register f is moved to
a destination dependent upon the
status of d. If d = 0,
destination is W register. If d = 1, the
destination is file register f itself. d = 1
is useful to test a file register since
status flag Z is affected.
1
1
After Instruction
MOVF
W =
Z
MOVF f,d
=
FSR, 0
value in FSR register
1
DS41419B-page 345
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