PIC16F1828T-I/SO Microchip Technology, PIC16F1828T-I/SO Datasheet - Page 128
PIC16F1828T-I/SO
Manufacturer Part Number
PIC16F1828T-I/SO
Description
7 KB Flash, 256 Bytes RAM, 32 MHz Int. Osc, 18 I/0, Enhanced Mid Range Core 20 S
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC16F1824-ISL.pdf
(2 pages)
3.PIC16F1824-ISL.pdf
(419 pages)
4.PIC16F1824-ISL.pdf
(10 pages)
Specifications of PIC16F1828T-I/SO
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (0.300", 7.50mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F722-ISS PDF datasheet
- PIC16F1824-ISL PDF datasheet #2
- PIC16F1824-ISL PDF datasheet #3
- PIC16F1824-ISL PDF datasheet #4
- Current page: 128 of 419
- Download datasheet (4Mb)
PIC16(L)F1824/1828
REGISTER 12-7:
REGISTER 12-8:
DS41419B-page 128
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-6
bit 5-0
Note 1:
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-6
bit 5-0
U-0
U-0
—
—
2:
Global WPUEN bit of the OPTION register must be cleared for individual pull-ups to be enabled.
The weak pull-up device is automatically disabled if the pin is in configured as an output.
Unimplemented: Read as ‘0’
WPUA<5:0>: Weak Pull-up Register bits
1 = Pull-up enabled
0 = Pull-up disabled
Unimplemented: Read as ‘0
INLVLA<5:0>: PORTA Input Level Select bits
For RA<5:0> pins, respectively
1 = ST input used for PORT reads and interrupt-on-change
0 = TTL input used for PORT reads and interrupt-on-change
U-0
U-0
—
—
WPUA: WEAK PULL-UP PORTA REGISTER
INLVLA: PORTA INPUT LEVEL CONTROL REGISTER
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
INLVLA5
R/W-1/1
WPUA5
R/W-0/0
INLVLA4
R/W-1/1
R/W-0/0
WPUA4
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
INLVLA3
R/W-1/1
WPUA3
R/W-0/0
INLVLA2
R/W-1/1
R/W-1/1
WPUA2
2010 Microchip Technology Inc.
INLVLA1
R/W-1/1
WPUA1
R/W-0/0
INLVLA0
R/W-1/1
R/W-0/0
WPUA0
bit 0
bit 0
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