1892Y-14LFT IDT, Integrated Device Technology Inc, 1892Y-14LFT Datasheet - Page 137

• Manufacturer Part Number: 1892Y-14LFT
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 1892Y-14LFT

• Lead Free Status / RoHS Status: Compliant

10.5.14 100M MII / 100M Stream Interface: Receive Latency
ICS1892, Rev. D, 2/26/01
Table 10-21
time periods consist of timings of signals on the following pins: TP_RX (that is, TP_RXP and TP_RXN),
RXCLK, and RXD (that is, RXD[3:0]).
Table 10-21. 100M MII / 100M Stream Interface Receive Latency Timing
Figure 10-14. 100M MII / 100M Stream Interface: Receive Latency Timing Diagram
Period
TP_RX*
RXCLK
RXD
*Shown
unscrambled.
Time
t1
t2
ICS1892
First Bit of /J/ into TP_RX to /J/ on RXD 100M MII
First Bit of /J/ into TP_RX to /J/ on RXD 100M Stream Interface
lists the significant time periods for the 100M MII / 100M Stream Interface receive latency. The
Parameter
© 2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
Figure 10-14
137
t1
t2
shows the timing diagram for the time periods.
Conditions
Chapter 10 DC and AC Operating Conditions
Min. Typ. Max.
–
–
16.9
TBD
12.5
February 26, 2001
17
Bit times
Bit times
Units