USB2514B-AEZG Standard Microsystems (SMSC), USB2514B-AEZG Datasheet - Page 52

• Manufacturer Part Number: USB2514B-AEZG
• Description: USB CHIP
• Manufacturer: Standard Microsystems (SMSC)

Specifications of USB2514B-AEZG

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Revision 1.1 (04-26-10)
8.2.1.35
8.2.2
8.2.2.1
8.2.2.2
8.2.2.3
8.2.3
NUMBER
BIT
7:3
2
1
0
Register FFh: Status/Command
I
The I
Philips Semiconductor Standard I
hub’s I
conforms to the Standard-mode I
protocol and electrical compatibility.
Note: Extensions to the I
The hub acts as the master and generates the serial clock SCL, controls the bus access (determines
which device acts as the transmitter and which device acts as the receiver), and generates the START
and STOP conditions.
Implementation Characteristics
The hub will only access an EEPROM using the sequential read protocol.
Pull-Up Resistor
The circuit board designer is required to place external pull-up resistors (10 kΩ recommended) on the
SDA / SMBDATA and SCL / SMBCLK / CFG_SEL[0] lines (per SMBus 1.0 specification, and EEPROM
manufacturer guidelines) to VDD33 in order to assure proper operation.
I
The slave address is 1010000.
Note: 10-bit addressing is NOT supported.
In-Circuit EEPROM Programming
The EEPROM can be programmed via ATE (automatic test equipment) by pulling RESET_N low
(which tri-states the hub’s EEPROM interface and allows an external source to program the EEPROM).
2
2
C EEPROM Slave Address
C EEPROM
USB_ATTACH
INTF_PW_DN
2
BIT NAME
C EEPROM interface implements a subset of the I
Reserved
2
RESET
C EEPROM interface is designed to attach to a single “dedicated” I
Reserved
SMBus Interface Power Down
‘0’ = Interface is active
‘1’ = Interface power down after ACK has completed
Reset the SMBus Interface and internal memory back to RESET_N
assertion default settings.
‘0’ = Normal Run/Idle State
‘1’ = Force a reset of registers to their default state
USB Attach (and write protect)
‘0’ = SMBus slave interface is active
‘1’ = The hub will signal a USB attach event to an upstream device, and the
internal memory (address range 00h-FEh) is “write-protected” to prevent
unintentional data corruption.
2
C specification are not supported.
2
2
C-Bus specification for details on I
C specification (100 kbit/s transfer rate and 7-bit addressing) for
DATASHEET
52
DESCRIPTION
2
C Master specification (Please refer to the
2
C bus protocols). The SMSC
USB 2.0 Hi-Speed Hub Controller
2
C EEPROM, and it
SMSC USB251x
Datasheet