MCZ33742EGR2 Freescale, MCZ33742EGR2 Datasheet - Page 23

MCZ33742EGR2

Manufacturer Part Number
MCZ33742EGR2
Description
Manufacturer
Freescale
Datasheet

Specifications of MCZ33742EGR2

Data Rate
1000Kbps
Number Of Transceivers
1
Standard Supported
CAN 2.0
Operating Supply Voltage (max)
27V
Operating Supply Voltage (typ)
5/9/12/15/18/24V
Operating Supply Voltage (min)
4.5V
Package Type
SOIC W
Supply Current
45mA
Operating Temperature (max)
125C
Operating Temperature (min)
-40C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
28
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCZ33742EGR2
Manufacturer:
FREESCALE
Quantity:
20 000
dedicated to automotive applications. Their functions include
the following:
RECEIVE AND TRANSMIT DATA (RXD AND TXD)
pins, respectively) are connected to a microcontroller’s CAN
protocol handler. TXD is an input and controls the CANH and
CANL line state (dominant when TXD is LOW, recessive
when TXD is HIGH). RXD is an output and reports the bus
state (RXD LOW when CAN bus is dominant, HIGH when
CAN bus is recessive). The RXD terminal is a push-pull
structure between the V2 pin and GND.
Voltage Digital Drain (VDD)
It can deliver up to 200mA. This output is protected against
over-current and over-temperature. It includes an over-
temperature pre-warning flag, which is set when the internal
regulator temperature exceeds 130°C typical. When the
temperature exceeds the over-temperature shutdown (170°C
typical), the regulator is turned off.
the RST pin LOW when VDD is below the under-voltage reset
threshold.
RESET OUTPUT (RST)
device is in reset mode. The RST pin is set HIGH when the
device is not in reset mode. RST includes an internal pullup
current source. When RST is LOW, the sink current capability
is limited, allowing RST to be shorted to 5.0V for software
debug or software download purposes.
INTERRUPT OUTPUT (INT)
interrupt occurs. INT is enabled using the Interrupt Register
(INTR). When an interrupt occurs, INT stays LOW until the
interrupt source is cleared.
Analog Integrated Circuit Device Data
Freescale Semiconductor
The 33742 and the 33742S are system basis chips (SBCs)
• One fully protected 5.0V voltage regulator with 200mA
• VDD regulator under-voltage reset function,
• Internal driver (V2) for an external series pass transistor
• Two running modes: Normal and Standby modes set by
The RXD and TXD pins (receive data and transmit data
The VDD pin is the output pin of the 5.0V internal regulator.
VDD includes an under-voltage reset circuitry, which sets
The Reset pin RST, is an output that is set LOW when the
The Interrupt pin INT, is an output that is set LOW when an
total output current capability available at the VDD pin.
programmable window or time-out software watchdog
function.
to implement a second 5.0V voltage regulator.
the system microcontroller.
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
INTRODUCTION
pulse when the device is in Stop mode.
VOLTAGE SOURCE 2 (V2)
connected to the external series pass transistor. V2 is also
the 5.0V supply of the internal CAN interface. It is possible to
connect V2 to an external 5.0V regulator or to the VDD output
when no external series pass transistor is used. In this case,
the V2CTRL pin must be left open. Refer to
Typical Application
VOLTAGE SOURCE 2 CONTROL (V2CTRL)
connected to the external series pass transistor.
VOLTAGE SUPPLY (VSUP)
HIGH-SIDE OUTPUT (HS)
internally protected against over-current and over-
temperature.
LEVEL 0-3 INPUTS (L0: L3)
the output of other ICs for external inputs. The input states
can be read by SPI. These inputs can be used as wake-up
events for the SBC when operating in the Sleep or Stop
mode.
CAN HIGH AND CAN LOW OUTPUTS
(CANH AND CANL)
CAN bus lines. They are controlled by TXD input level, and
• Sleep and Stop modes low power operating modes to
• Programmable wake-up input and cyclic sense wake-
• CAN high-speed physical bus interface with TXD and
• An SPI interface for use in communicating with a MCU
INT output also reports a wake-up event by a 10μs typical
The V2 pin is the input sense for the V2 regulator. It is
The V2CTRL pin is the output drive pin for the V2 regulator
The VSUP pin is the battery supply input of the device.
The HS pin is the internal high side driver output. It is
The L0 : L3 pins can be connected to contact switches or
The CAN High and CAN Low pins are the interfaces to the
reduce an application’s current consumption while
providing a wake-up capability from the CAN interface,
L3 : L0 wake-up inputs, or from a timer wake-up.
ups.
RXD fault diagnostic capability and enhanced
protection features.
and Interrupt outputs to report SBC status, perform
diagnostics, and report wake-up events.
Schematic, page 57.
FUNCTIONAL DESCRIPTION
Figure 31, SBC
INTRODUCTION
33742
23

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