PXB4221EV34NP Lantiq, PXB4221EV34NP Datasheet - Page 77

PXB4221EV34NP

Manufacturer Part Number
PXB4221EV34NP
Description
Manufacturer
Lantiq
Datasheet

Specifications of PXB4221EV34NP

Data Rate
2.048Mbps
Number Of Channels
1
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
Figure 21
PLL-ACM tries to keep the number of bytes in the Reassembly Buffer at the average
buffer filling value programmed to register “avbN”. This value should be equivalent to the
number of bytes stored in the Reassembly Buffer during start-up, as defined by the value
programmed in the “starv_ini” field of the “AAL Transmit Reference Slot” in RAM3.
During start-up and restart, PLL-ACM will be free running for 8 x tiniN[tini] x T
programmed in the Time of Initial Free Run Register (“tiniN”, see
this time the data buffer is filled with an initial number of bytes. As tiniN[tini] is 2 bit longer
than “stav_ini” in the AAL Transmit Reference Slot of RAM3 it is possible to choose a
longer-than-necessary initialization time, to compensate start-up time differences.
After the initial free run, PLL-ACM will start locking in. The lock in time depends on:
• The difference between the initial number of bytes in the data buffer (see “starv_ini” of
• The damping, which is influenced by register “asfN”.
• The maximum allowed frequency deviation given by “tur” of register “condN”.
• The required frequency deviation.
Data Sheet
the “AAL Transmit Reference Slot” in RAM3) and the value programmed in register
“avbN”.
f/f
1
0.1
0
Influence of Damping on Lock in Time
Tr(dl)
Tr(do) = Tl(do)
do
dh
dl
77
PXB 4219E, PXB 4220E, PXB 4221E
dl: low damping
dh: high damping
do: optimized damping
Tr(dh) = Tl(dh)
Operational Description
Chapter
ACM Edge response
7.54). During
IWE8, V3.4
t
2003-01-20
Data
as

Related parts for PXB4221EV34NP