ICS870S208BKT IDT, Integrated Device Technology Inc, ICS870S208BKT Datasheet - Page 12

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ICS870S208BKT

Manufacturer Part Number
ICS870S208BKT
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Dividerr
Datasheet

Specifications of ICS870S208BKT

Number Of Clock Inputs
2
Mode Of Operation
Differential
Output Frequency
250MHz
Output Logic Level
LVCMOS/LVTTL
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.465V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
32
Lead Free Status / RoHS Status
Not Compliant
W
R
IDT
Figure 2 shows how the differential input can be wired to accept
single ended levels. The reference voltage V_REF = V
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The ratio
I
CLK/nCLK I
For applications not requiring the use of the differential input,
both CLK and nCLK can be left floating. Though not required, but
for additional protection, a 1kΩ resistor can be tied from CLK to
ground.
LVCMOS C
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1kΩ resistor can be used.
NPUTS
ECOMMENDATIONS FOR
ICS870S208
DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER W/DIVIDER AND GLITCHLESS SWITCH
IRING THE
/ ICS
:
LVCMOS FANOUT BUFFER W/DIVIDER
ONTROL
NPUTS
D
IFFERENTIAL
P
INS
U
NUSED
I
NPUT TO
F
IGURE
I
NPUT AND
A
Single Ended Clock Input
2. S
CCEPT
A
PPLICATION
INGLE
O
S
UTPUT
INGLE
E
NDED
C1
0.1u
DD
V_REF
/2 is
E
P
S
NDED
INS
IGNAL
12
I
L
NFORMATION
of R1 and R2 might need to be adjusted to position the V_REF in
the center of the input voltage swing. For example, if the input
clock swing is only 2.5V and V
and R2/R1 = 0.609.
O
LVCMOS O
All unused LVCMOS output can be left floating. There should be
no trace attached.
D
EVELS
RIVING
UTPUTS
R1
1K
R2
1K
V
DD
D
CLKx
nCLKx
IFFERENTIAL
:
UTPUTS
I
NPUT
ICS870S208BK REV. A NOVEMBER 9, 2007
DD
= 3.3V, V_REF should be 1.25V
PRELIMINARY

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