ICS870S208BKT IDT, Integrated Device Technology Inc, ICS870S208BKT Datasheet

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ICS870S208BKT

Manufacturer Part Number
ICS870S208BKT
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Dividerr
Datasheet

Specifications of ICS870S208BKT

Number Of Clock Inputs
2
Mode Of Operation
Differential
Output Frequency
250MHz
Output Logic Level
LVCMOS/LVTTL
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.465V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
32
Lead Free Status / RoHS Status
Not Compliant
DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER W/
DIVIDER AND GLITCHLESS SWITCH
G
variety of differential input types. The device provides the cap-
ability to suppress any glitch at the outputs of the device during
an input clock switch to enhance clock redundancy in fault tole-
rant applications. The low impedance LVCMOS outputs are
designed to drive 50Ω series or parallel terminated transmission
lines. The effective fanout can be increased from 8 to 16 by utilizing
the ability of the outputs to drive two series terminated lines. The
divide select inputs, DIV_SELA and DIV_SELB, control the output
frequency of each bank. The output banks can be independently
selected for ÷1 or ÷2 operation. The output enable pins assigned
to each output, support enabling and disabling of each output
individually.
The ICS870S208 is characterized at full 3.3V and 2.5V, and mixed
3.3V/2.5V output operating supply modes. Guaranteed output and
part-to-part skew characteristics make the ICS870S208 ideal for
high performance, single ended applications.
B
DIV_SELA
DIV_SELB
The Preliminary Information presented herein represents a product in pre-production. The noted characteristics are based on initial product characterization
and/or qualification. Integrated Device Technology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.
IDT
CLK_SEL
HiPerClockS™
IC S
LOCK
nCLK0
nCLK1
ENERAL
CLK0
CLK1
/ ICS
Pulldown
Pulldown
Pullup
Pulldown
Pullup
Pulldown
Pulldown
LVCMOS FANOUT BUFFER W/DIVIDER
D
The ICS870S208 is a low skew, 8 output LVCMOS /
LVTTL Fanout Buffer with selectable divider and a
member of the HiPerClockS™ family of High
Perfor mance Clock Solutions from IDT. The
ICS870S208 has 2 selectable inputs that accept a
IAGRAM
D
ESCRIPTION
0
1
÷1
÷2
0
1
0
1
QA0
OE_A0
QA1
OE_A1
QA2
OE_A2
QA3
OE_A3
QB0
OE_B0
QB1
OE_B1
QB2
OE_B2
QB3
OE_B3
1
F
• Eight LVCMOS/LVTTL outputs (2 banks of 4 outputs)
• Two selectable differential CLKx/nCLKx clock inputs
• Dual differential input pairs can accept the following differen-
• Maximum output frequency: 250MHz
• Independent bank control for ÷1 or ÷2 operation
• Glitchless output behavior during input switch
• Output skew: 50ps (typical) @ 3.3V
• Bank skew: 30ps (typical) @ 3.3V
• Supply modes:
• 0°C to 70°C ambient operating temperature
• Available in both standard (RoHS 5) and lead-free (RoHS 6)
Each output has individual synchronous output enable
tial input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
Core/Output
3.3V/3.3V
2.5V/2.5V
3.3V/2.5V
packages
EATURES
P
DIV_SELB
DIV_SELA
CLK_SEL
IN
nCLK0
nCLK1
CLK0
CLK1
V
A
DD
SSIGNMENT
1
2
3
4
5
6
7
8
5mm x 5mm x 0.925mm
32 31 30 29 28 27 26 25
9 10 11 12 13 14 15 16
32-Lead VFQFN
ICS870S208
ICS870S208BK REV. A NOVEMBER 9, 2007
package body
K Package
Top View
PRELIMINARY
ICS870S208
24
23
22
21
20
19
18
17
OE_B3
OE_B2
OE_B1
OE_B0
OE_A3
OE_A2
OE_A1
OE_A0

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ICS870S208BKT Summary of contents

Page 1

DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER W/ DIVIDER AND GLITCHLESS SWITCH G D ENERAL ESCRIPTION The ICS870S208 is a low skew, 8 output LVCMOS / IC S LVTTL Fanout Buffer with selectable divider and a member of the HiPerClockS™ family of High HiPerClockS™ ...

Page 2

ICS870S208 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER W/DIVIDER AND GLITCHLESS SWITCH F D UNTIONAL ESCRIPTION ALID LOCKS The ICS87S0208 has a glitch free input mux that is controlled by the CLK_SEL pin designed to switch between 2 ...

Page 3

ICS870S208 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER W/DIVIDER AND GLITCHLESS SWITCH NPUT LOCK An internal timer monitors the state of both input clocks clock is stopped (stuck high or low for over approximately 200ns), its internal input ...

Page 4

ICS870S208 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER W/DIVIDER AND GLITCHLESS SWITCH WITCH URING AN NPUT AD ETECT If a CLK_SEL, DIV_SEL event happens after a clock has stopped , but before the input bad flag has ...

Page 5

ICS870S208 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER W/DIVIDER AND GLITCHLESS SWITCH ABLE IN HARACTERISTICS ...

Page 6

ICS870S208 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER W/DIVIDER AND GLITCHLESS SWITCH BSOLUTE AXIMUM ATINGS Supply Voltage Inputs, V -0. Outputs, V -0. Package Thermal Impedance, θ JA Storage Temperature, T -65°C to ...

Page 7

ICS870S208 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER W/DIVIDER AND GLITCHLESS SWITCH T 4D. LVCMOS DC C ABLE HARACTERISTICS ...

Page 8

ICS870S208 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER W/DIVIDER AND GLITCHLESS SWITCH T 5A ABLE HARACTERISTICS ...

Page 9

ICS870S208 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER W/DIVIDER AND GLITCHLESS SWITCH T 5C 3.3V±5%, V ABLE HARACTERISTICS ...

Page 10

ICS870S208 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER W/DIVIDER AND GLITCHLESS SWITCH P ARAMETER 1.65V± DDOA, V DDOB LVCMOS GND -1.65V±5% 3.3V C /3. ORE UTPUT OAD EST 2.05V±5% 1.25V± DDOA, V DDOB ...

Page 11

ICS870S208 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER W/DIVIDER AND GLITCHLESS SWITCH PART 1 V DDOX Qx 2 PART 2 V DDOX Qy 2 tsk(pp ART TO ART KEW 80% 20% Clock t Outputs UTPUT ...

Page 12

ICS870S208 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER W/DIVIDER AND GLITCHLESS SWITCH IRING THE IFFERENTIAL NPUT TO Figure 2 shows how the differential input can be wired to accept single ended levels. The reference voltage V_REF = V generated by the ...

Page 13

ICS870S208 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER W/DIVIDER AND GLITCHLESS SWITCH IFFERENTIAL LOCK NPUT NTERFACE The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL and other differential signals. Both V SWING V and V input requirements. Figures 3A to ...

Page 14

ICS870S208 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER W/DIVIDER AND GLITCHLESS SWITCH VFQFN EPAD T R HERMAL ELEASE In order to maximize both the removal of heat from the package and the electrical perfor mance, a land patter n must be incorporated on the ...

Page 15

ICS870S208 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER W/DIVIDER AND GLITCHLESS SWITCH 6. θ ABLE VS IR LOW ABLE FOR A JA Multi-Layer PCB, JEDEC Standard Test Boards T C RANSISTOR OUNT The transistor count for ICS870S208 is: 2788 ...

Page 16

ICS870S208 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER W/DIVIDER AND GLITCHLESS SWITCH ACKAGE UTLINE UFFIX FOR NOTE: The following package mechanical drawing is a generic drawing that applies to any pin count VFQFN package. This draw- ing ...

Page 17

ICS870S208 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER W/DIVIDER AND GLITCHLESS SWITCH ABLE RDERING NFORMATION ...

Page 18

ICS870S208 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER W/DIVIDER AND GLITCHLESS SWITCH Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 United ...

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