XC2S300E-6PQG208C Xilinx Inc, XC2S300E-6PQG208C Datasheet - Page 87

• Manufacturer Part Number: XC2S300E-6PQG208C
• Description: FPGA Spartan®-IIE Family 300K Gates 6912 Cells 357MHz 0.15um Technology 1.8V 208-Pin PQFP
• Manufacturer: Xilinx Inc
• Series: Spartan™-IIEr

Specifications of XC2S300E-6PQG208C

• Package: 208PQFP
• Family Name: Spartan®-IIE
• Device Logic Cells: 6912
• Device Logic Units: 1536
• Device System Gates: 300000
• Maximum Internal Frequency: 357 MHz
• Typical Operating Supply Voltage: 1.8 V
• Maximum Number Of User I/os: 146
• Ram Bits: 65536
• Number Of Logic Elements/cells: 6912
• Number Of Labs/clbs: 1536
• Total Ram Bits: 65536
• Number Of I /o: 146
• Number Of Gates: 300000
• Voltage - Supply: 1.71 V ~ 1.89 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 208-BFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1326

FG456 Pinouts (XC2S100E, XC2S150E, XC2S200E, XC2S300E, XC2S400E, XC2S600E)
DS077-4 (2.3) June 18, 2008
Product Specification
I/O
I/O, L#P
I/O, L#N
I/O
I/O, L#P
I/O, VREF
Bank 0,
L#N
I/O
I/O, L#P
I/O, L#N
I/O
I/O, L#P
I/O, L#N
I/O, L#P
I/O, L#N
I/O, L#P
I/O, L#N
I/O, L#P
I/O, VREF
Bank 0,
L#N
I/O
I/O
I/O, L#P
I/O, L#N
I/O, L#P
I/O, L#N
Function Bank
Pad Name
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
A10
B10
E11
C10
D10
E10
F11
F10
Pin
A9
B9
C9
D9
E9
A8
B8
C8
D8
A7
B7
C7
D7
E8
E7
F9
300E, 400E,
300E, 400E,
200E, 300E,
200E, 300E,
200E, 300E,
200E, 300E,
XC2S300E,
XC2S300E,
XC2S200E,
XC2S200E,
XC2S100E,
150E, 200E
XC2S100E,
150E, 200E
XC2S150E,
XC2S150E,
XC2S100E,
400E, 600E
XC2S100E,
400E, 600E
XC2S100E,
400E, 600E
XC2S100E,
400E, 600E
XC2S150E,
XC2S150E,
XC2S150E,
XC2S150E,
Async.
Output
Option
LVDS
600E
600E
600E
600E
200E
200E
200E
200E
200E
200E
-
-
-
-
-
-
-
-
XC2S400E,
XC2S600E
Option
600E
V
All
All
REF
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
I/O, L6P_Y
I/O, L6N_Y
I/O, L5P_Y
I/O, L5N_Y
I/O, L4P_Y
I/O, VREF
I/O, VREF
I/O, L7N
I/O, L3N
I/O, L8P
I/O, L7P
I/O, L3P
Bank 0,
Bank 0,
L4N_Y
100E
L8N
www.xilinx.com
I/O
I/O
-
-
-
-
-
-
-
-
-
-
I/O, L9P_Y
I/O, L9N_Y
I/O, L8P_Y
I/O, L8N_Y
I/O, L5P_Y
I/O, L5N_Y
I/O, L4P_Y
I/O, L4N_Y
I/O, VREF
I/O, VREF
I/O, L11P
I/O, L11N
I/O, L10P
I/O, L7P
I/O, L7N
I/O, L6P
Bank 0,
Bank 0,
L10N
150E
L6N
I/O
I/O
I/O
-
-
-
-
-
Device-Specific Pinouts: XC2S
I/O, L11P_Y I/O, L11P_Y I/O, L11P_Y I/O, L11P_Y
I/O, L9N_Y
I/O, L8N_Y
I/O, L7N_Y
I/O, L5N_Y
I/O, L4N_Y
I/O, L9P_Y
I/O, L8P_Y
I/O, L7P_Y
I/O, L6P_Y
I/O, L5P_Y
I/O, L4P_Y
I/O, VREF
I/O, VREF
I/O, L12N
I/O, L10N
I/O, L12P
I/O, L10P
L11N_Y
Bank 0,
Bank 0,
L6N_Y
200E
I/O
I/O
I/O
I/O
Spartan-IIE FPGA Family: Pinout Tables
-
-
I/O, L12P_Y
I/O, L7P_Y
I/O, L7N_Y
I/O, L6P_Y
I/O, VREF
I/O, VREF
I/O, L10P
I/O, L10N
L12N_Y
L11N_Y
I/O, L9P
I/O, L9N
I/O, L8P
I/O, L8N
I/O, L5P
I/O, L5N
I/O, L4P
I/O, L4N
Bank 0,
Bank 0,
L6N_Y
300E
I/O,
I/O
I/O
I/O
I/O
I/O
I/O
I/O, L7N_Y
I/O, L7P_Y
I/O, L6P_Y
I/O, VREF
I/O, VREF
I/O, VREF
I/O, L12N
I/O, L10N
I/O, L12P
I/O, L10P
I/O, L9N
I/O, L8N
I/O, L5N
I/O, L4N
L11N_Y
I/O, L9P
I/O, L8P
I/O, L5P
I/O, L4P
Bank 0,
Bank 0,
Bank 0
L6N_Y
400E
I/O
I/O
I/O
I/O
I/O
I/O, L12P_Y
Bank 0, L5P
I/O, L7P_Y
I/O, L7N_Y
I/O, L6P_Y
I/O, VREF
I/O, VREF
I/O, VREF
I/O, VREF
I/O, L10P
I/O, L10N
L12N_Y
L11N_Y
I/O, L9P
I/O, L9N
I/O, L8P
I/O, L8N
I/O, L5N
I/O, L4P
I/O, L4N
Bank 0,
Bank 0,
Bank 0
L6N_Y
600E
I/O,
I/O
I/O
I/O
I/O
I/O
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