MT8952BP1 Zarlink, MT8952BP1 Datasheet - Page 20

• Manufacturer Part Number: MT8952BP1
• Description: PB FREE HDLC CONTROLLER, PLCC
• Manufacturer: Zarlink

MT8952B
AC Electrical Characteristics
(Figures 19, 20, 21 and 22).
† Timing is over recommended temperature & power supply voltages (V
‡ Typical figures are at 25
Note: The frequency of the clock input CKi is assumed to be at the output bit rate. However, it can be at twice the bit rate in the Internal
Timing Mode.
3-80
1
2
3
4
5
6
7
8
9
CKi
TEOP
CDSTi
REOP
RST
CDSTo
Interrupt request release time
WD output delay HIGH to LOW
WD output delay LOW to HIGH
TEOP/REOP output delay
TEOP/REOP output hold time
CDSTo delay from CKi
CDSTi setup time
CDSTi hold time
RESET pulse width
Characteristics
End Flag or Abort Sequence
t
STiS
ISO-CMOS
°
C and are for design aid only: not guaranteed and not subject to production testing.
Figure 22 - Serial Port Input and REOP, Output and TEOP
t
STiH
Voltages are with respect to ground (V
†
- Serial Port, RESET, WD Timer and IRQ Release Time
t
EOPD
t
t
t
t
t
t
Sym
WDHL
WDLH
t
EOPD
EOPH
STOD
t
t
IRQR
STiS
STiH
RST
Figure 21 - RESET Timing
t
EOPD
t
RST
Min
20
65
DD
Typ
=5V
100
SS
) unless otherwise stated.
±
‡
t
5%, V
STOD
Max
120
135
135
110
110
125
SS
=0V, T
Flag or Idle Sequence
Units
t
A
EOPH
=–40 to 85
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
EOPH
Test load circuit 2 (Fig.26)
Test load circuit 1 (Fig.26)
Test load circuit 1 (Fig.26)
Test load circuit 1 (Fig.26)
Test load circuit 1 (Fig.26)
Test load circuit 1 (Fig.26)
°
C).
Test Conditions