MT8952BP1 Zarlink, MT8952BP1 Datasheet

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MT8952BP1

Manufacturer Part Number

MT8952BP1

Description

PB FREE HDLC CONTROLLER, PLCC

Manufacturer

Zarlink

Datasheet

1.MT8952BP1.pdf (26 pages)

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Bonase Electronics (HK) Co., Limited

Part Number:

MT8952BP1

Manufacturer:

ZARLINK

Quantity:

70

Company:

BOSTOCK HK LIMITED

BOSTOCK HK LIMITED

Part Number:

MT8952BP1

Manufacturer:

ZARLINK

Quantity:

2 039

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Download datasheet (672Kb)

Features

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Applications

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A0-A3

D0-D7

Formats data as per X.25 (CCITT) level-2

standards

Go-Ahead sequence generation and detection

Single byte address recognition

Microprocessor port and directly accessible

registers for ﬂexible operation and control

19 byte FIFO in both send and receive paths

Handshake signals for multiplexing data links

High speed serially clocked output (2.5 Mbps)

ST-BUS compatibility with programmable

channel selection for data and separate

timeslot for control information

Independent watchdog timer

Facility to disable protocol functions

Low power ISO-CMOS technology

Data link controllers and protocol generators

Digital sets, PBXs and private packet networks

D-channel controller for ISDN basic access

C-channel controller to Digital Network

Interface Circuits (typically MT8972)

Interprocessor communication

RST

R/W

V

IRQ

V

WD

CS

DD

SS

E

C-Channel

Processor

Interface

Interface

Receive

Micro

FIFO

Receive Logic

Transmit

Figure 1 - Functional Block Diagram

FIFO

Decoder

Address

ISO-CMOS ST-BUS  FAMILY

Transmit

Logic

Detection

Address

Registers

Interrupt

Description

The MT8952B HDLC Protocol Controller frames and

formats data packets according to X.25 (Level 2)

Recommendations from the CCITT.

MT8952BE

MT8952BP

MT8952BS

Insertion

Deletion

and Status

Register

Zero

Zero

Control

HDLC Protocol Controller

Ordering Information

-40 ° C to 85 ° C

28 Pin Plastic DIP

28 Pin PLCC

28 Pin SOIC

ISSUE6

Flag/Abort/

Detection

Flag/Abort

Generator

Timing

Logic

Idle

MT8952B

March 1997

TEOP

CDSTo

F0i

CKi

RxCEN

TxCEN

CDSTi

REOP

3-61

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