821054PQF Integrated Device Technology (Idt), 821054PQF Datasheet - Page 18

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821054PQF

Manufacturer Part Number
821054PQF
Description
Audio Codec 4ADC / 4DAC 64-Pin PQFP
Manufacturer
Integrated Device Technology (Idt)
Type
PCMr
Datasheet

Specifications of 821054PQF

Package
64PQFP
Number Of Channels
4ADC /4 DAC
Number Of Dacs
4
Operating Supply Voltage
5 V

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821054PQFG
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IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE
containing the coefficient of the Frequency Response Correction in
Receive Path and the Gain in Receive Path.
specify a channel (by setting the corresponding CE bit in GREG6 to ‘1’)
before writing/reading coefficients to/from the Coe-RAM.
needed to fulfill with MSB first, but the lowest two bits (b[1:0]) will be
ignored. When read, each word will output 16 bits with MSB first, but the
lowest two bits (b[1:0]) are meaningless.
Coe-RAM to be accessed. When a Coe-RAM command is executed, the
CODEC automatically counts down from the highest address to the
lowest address of the specified block. So all 8 words of the block will be
addressed by one Coe-RAM command.
adjacent addressing can be stopped by the CS signal at any time. If the
3.1.6
3.1.6.1
3.1.6.2
3.1.6.3
Block 5: FRR RAM (Word 32 - Word 38) and GRX RAM (Word 39),
For the Coe-RAM is addressed on a per-channel basis, users should
To write a Coe-RAM word, 16 bits (b[15:0]) or two 8-bit bytes are
The address in a Coe-RAM command (b[4:0]) specifies a block of
When addressing the Coe-RAM, the procedure of consecutive
• Writing to LREG2 and LREG1 of Channel 1:
1010, 0101
0001, 0010
1000, 0001
xxxx, xxxx
xxxx, xxxx
• Reading from LREG2 and LREG1 of Channel 1:
1010, 0101
0001, 0010
0000, 0001
After the preceding commands are executed, data will be sent out as follows:
1000, 0001
xxxx, xxxx
xxxx, xxxx
• Writing to GREG1:
1010, 0000
1111, 1111
• Reading from GREG1:
0010, 0000
After the preceding command is executed, data will be sent out as follows:
1000, 0001
0000, 0001
• Writing to the Coe-RAM
1010,0101
0001,0010
1110,0010
data byte 1
data byte 2
data byte 3
data byte 4
data byte 5
data byte 6
data byte 7
data byte 8
PROGRAMMING EXAMPLES
Example of Programming Local Registers
Example of Programming Global Registers
Example of Programming the Coefficient-RAM
Channel Enable command
Data for GREG6 (Channel 1 is enabled for programming)
Local register write command (The address is '00001', which means that data will be written to LREG2 and LREG1.)
Data for LREG2
Data for LREG1
Channel Enable command
Data for GREG6 (Channel 1 is enabled for programming)
Local register read command (The address is '00001', which means that LREG2 and LREG1 will be read.)
Identification code
Data read out from LREG2
Data read out from LREG1
Global register write command (The address is '00000', which means that data will be written to GREG1.)
Data for GREG1
Global register read command (The address is '00000', which means that GREG1 will be read.)
Identification code
Data read out from GREG1
Channel Enable command
Data for GREG6 (Channel 1 is enabled for programming)
Coe-RAM write command (The address of '00010' is located in block 3, which means that data will be written to block 3.)
high byte of word 8 of block 3
low byte of word 8 of block 3
high byte of word 7 of block 3
low byte of word 7 of block 3
high byte of word 6 of block 3
low byte of word 6 of block 3
high byte of word 5 of block 3
low byte of word 5 of block 3
18
CS signal is changed from low to high, the operation to the current word
and the next adjacent words will be aborted. However, the previous
operation results will not be affected.
3.1.5
words. The total 32 words (i.e. 64 bytes) of FSK-RAM are shared by all
four channels and only one channel can use it at one time.
fulfill with MSB first. When being read, each FSK-RAM word in FSK-
RAM will output 16 bits with MSB first.
should be ‘0’ and the b4 bit should be ‘1’, the b[2:0] bits specify one of
the 4 blocks of FSK-RAM. Then, all 8 words of the specified block will be
addressed automatically, with the highest order word first.
The FSK-RAM consists of 4 blocks, and each block has 8 16-bit
To write a FSK-RAM word, 16 bits (or, two 8-bit bytes) are needed to
When addressing the FSK-RAM, the b3 bit in a FSK-RAM Command
ADDRESSING FSK-RAM
INDUSTRIAL TEMPERATURE RANGE

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