WM8900LGEFK/RV Wolfson Microelectronics, WM8900LGEFK/RV Datasheet - Page 31

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WM8900LGEFK/RV

Manufacturer Part Number
WM8900LGEFK/RV
Description
Audio CODECs Ultra Low Power Hi-Fi CODEC
Manufacturer
Wolfson Microelectronics
Datasheet

Specifications of WM8900LGEFK/RV

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Price
Part Number:
WM8900LGEFK/RV
Manufacturer:
WOLFSON
Quantity:
20 000
Production Data
Figure 12 Single-ended Microphone Configurations
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Rin = 20k / [1/GAIN)+1], where GAIN is voltage gain of the input PGA stage.
For example, if the input PGA gain is +13dB, then GAIN = 4.47 and Rin = 16.3k.
The external connections for this configuration and the required register settings are detailed
below:
Note that setting IN2L_ENA and IN3L_ENA to 0 automatically causes Vmid to be connected to the
non-inverting Left PGA input. Similarly setting IN2R_ENA and IN3R_ENA to 0 automatically
causes Vmid to be connected to the non-inverting Right PGA input.
DIFFERENTIAL MICROPHONE INPUTS
In this configuration, the non-inverted microphone signal is connected to LINPUT2 (RINPUT2) or
LINPUT3 (RINPUT3) and the inverted (or noisy ground) signal is connected to LINPUT1
(RINPUT1). The remaining input must not be connected to the input PGA, and is available for use
as an additional Line input. The Left (Right) channel input PGA and boost PGA must both be
enabled in this configuration. The gain of the input PGA and Boost PGA can be controlled via
register settings, as described in Table 14 and Table 15.
Note that the input impedance LINPUT1 (RINPUT1) changes with the input PGA gain setting, as
described under “Electrical Characteristics”. In this configuration, the input impedance LINPUT2
(RINPUT2) or LINPUT3 (RINPUT3) does not change with the gain setting. The inverting and non-
inverting inputs are therefore not matched and this configuration is not fully differential. The
LINPUT1 (RINPUT1) input impedance can be determined for any gain setting as described above
for the Single-Ended configuration.
The external connections for this configuration and the required register settings are detailed
below:
LINPUT1 (RINPUT1) and LINPUT2 (RINPUT2) or
LINPUT1 (RINPUT1) and LINPUT3 (RINPUT3)
PD, August 2008, Rev 4.0
WM8900
31

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