CS8427-CSZR Cirrus Logic Inc, CS8427-CSZR Datasheet - Page 12

• Manufacturer Part Number: CS8427-CSZR
• Description: Audio DSPs IC 96 kHz Digital Audio Transceiver
• Manufacturer: Cirrus Logic Inc

Specifications of CS8427-CSZR

• Operating Temperature Range: - 10 C to + 70 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-28
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3. GENERAL DESCRIPTION
The CS8427 is an AES3 transceiver intended to be
used in digital audio systems. Such systems in-
clude digital mixing consoles, effects processors,
digital recorders, and computer multimedia sys-
tems.
3.1
The CS8427 has the following Audio ports:
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The Serial Audio ports use a three-wire format.
This consists of a serial audio data stream, a left-
right clock defining the boundaries of the audio
sample frames, and a serial clock signal clocking
the data bits.
A Serial Audio port may operate in either Master or
Slave mode. When a port is a Master, it supplies
the left-right clock and the serial clock to the exter-
nal device that is sending or receiving the serial data.
A port in slave mode must have its left-right clock
and its serial clock supplied by an external device
so that it may send or receive serial audio data.
The input sample rate is determined by the stream
applied to the Serial Audio Input or to the AES3 Re-
ceiver. A phase-locked loop recovers RMCK, the
input master clock signal, from the chosen input
stream.
The output from the device may be through the Se-
rial Audio Output, the AES3 Transmitter, or from
both simultaneously. In some configurations, all
audio ports of the device may be in use at the same
time.
3.2
Besides the functional blocks already described,
the device also has a control port that allows the
user to read and write the control registers that
configure the part. The control port is capable of
operating in either SPI or I²C serial mode. This port
also has access to buffer memory that allows the
user to control what is transmitted in the Channel
Status and User bits of the outgoing AES3 stream.
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Serial Audio Input Port
Serial Audio Output Port
AES3 or S/PDIF Receiver
AES3 or S/PDIF Transmitter
Audio Input/Output Ports
Serial Control Port
The control port is clocked by the serial clock sig-
nal that the user's microcontroller sends it. The
MCU can read and write the registers even when
the RMCK and OMCK clocks are not running. The
Channel Status and User bit buffer memories de-
pend on clocking from RMCK and OMCK. They will
not function unless the clocks are running, and the
RUN bit in the Clock Source Control register is set.
There is also an interrupt signal associated with
the Serial Control Port and the internal registers.
The format of the interrupt may be chosen by a reg-
ister setting. There are two interrupt status regis-
ters and their associated interrupt mask registers.
3.3
The memory architecture consists of three buffers
to handle the Channel Status information, and an-
other three buffers to handle the User bits. The
data recovery logic extracts the Channel Status
and User bits from the AES3 stream and places
them in their respective D buffers. Each buffer con-
tains 384 bits.
This is enough memory to hold a complete block of
Channel Status bits from both A and B channels
and a complete block of User bits.
When the D buffers are full, the chip transfers their
contents into the E buffers. While in the E buffers
the Channel Status and User bits may be read or
written through the control port. This allows the
user to alter them to suit the needs of the applica-
tion. The control bit BSEL, in the Channel Status
Data Buffer Control register, determines whether
the control port has access to the Channel Status
bits or the User bits. The AES3 encoder reads the
Channel Status and User bits from the F buffers
and inserts them into the outgoing AES3 stream.
After the F buffers bits are transmitted, the device
transfers the current contents of the E buffers into
the F buffers.
In applications using AES3 in and AES3 out, the
CS8427 can automatically transceive user data
that conforms to the IEC60958 format. The
CS8427 also gives the user access to the bits nec-
essary to comply with the serial copy management
system (SCMS).
In applications where the user want to read/modi-
fy/write the Channel Status information that re-
quires a microcontroller to actively manage the
Channel Status and User bit Memory
CS8427
DS477F5