CRD42L51 Cirrus Logic Inc, CRD42L51 Datasheet - Page 71

• Manufacturer Part Number: CRD42L51
• Description: Ref Bd Low-voltage Stereo Codec
• Manufacturer: Cirrus Logic Inc

DS679F1
6.24
6.25
Reserved
MAX2
7
7
ALC Release Rate (Address 1Dh)
ALC Release Rate (RRATE[5:0])
Default: 111111
Function:
Sets the rate at which the ALC releases the PGA & digital attenuation from levels below the minimum setting
in the ALC threshold register, and returns the input level to the PGA_VOL[4:0] & ADCx_ATT[7:0] setting.
The ALC release rate is user selectable, but is also a function of the sampling frequency, Fs, and the SOFTx
& ZCROSS bit settings unless the disable bit for each function is enabled.
ALC Threshold (Address 1Eh)
Maximum Threshold (MAX[2:0])
Default: 000
Function:
Sets the maximum level, relative to full scale, at which to limit and attenuate the input signal at the attack
rate.
Minimum Threshold (MIN[2:0])
Default: 000
MAX[2:0] Threshold
MIN[2:0]
000
001
010
100
101
000
001
010
011
110
111
Binary Code
000000
111111
Reserved
MAX1
···
6
6
Threshold
Setting
Setting
(dB)
(dB)
-12
-18
-24
-30
-3
-6
-9
-3
-6
0
0
ALC_RRATE5 ALC_RRATE4 ALC_RRATE3 ALC_RRATE2 ALC_RRATE1 ALC_RRATE0
MAX0
5
5
Slowest Release
Fastest Release
Release Time
···
MIN2
4
4
MIN1
3
3
MIN0
2
2
Reserved
1
1
CS42L51
Reserved
0
0
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