ADIS16265BCCZ Analog Devices Inc, ADIS16265BCCZ Datasheet - Page 5

• Manufacturer Part Number: ADIS16265BCCZ
• Description: IC SENSOR GYRO PROGR 10MV 20LGA
• Manufacturer: Analog Devices Inc
• Series: MEMSr

Specifications of ADIS16265BCCZ

• Range °/s: ±80°/s, ±160°/s, ±320°/s
• Sensitivity: ±0.2%
• Typical Bandwidth: 50Hz
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 41mA
• Output Type: Digital
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 20-LGA
• No. Of Axes: 1
• Sensor Case Style: LGA
• No. Of Pins: 20
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: -40°C To +105°C
• Msl: MSL 5 - 48 Hours
• Termination Type: SMD
• Acceleration Range: 2000g
• Filter Terminals: SMD
• Digital Ic Case Style: LGA
• Lead Free Status / RoHS Status: Lead free / RoHS compliant by exemption

TIMING SPECIFICATIONS
T
Table 2.
Parameter
f
t
t
t
t
t
t
t
t
t
1
2
3
Timing Diagrams
SCLK
DATARATE
STALL
CS
DAV
DSU
DHD
DF
DR
SFS
Guaranteed by design; not production tested.
The MSB presents an exception to this parameter. The MSB clocks out on the falling edge of CS . The rest of the DOUT bits are clocked after the falling edge of SCLK and
are governed by this specification.
This parameter may need to be expanded to allow for proper capture of the LSB. After CS goes high, the DOUT line goes into a high impedance state.
A
= −40°C to +85°C, V
DOUT
SCLK
DIN
CS
Description
Serial clock
Data rate period
Stall period between data
Chip select to clock edge
Data output valid after SCLK falling
edge
Data input setup time before SCLK
rising edge
Data input hold time after SCLK
rising edge
Data output fall time
Data output rise time
CS high after SCLK edge
*NOT DEFINED
2
CC
t
CS
*
= 5.0 V, unless otherwise noted.
SCLK
1
MSB
CS
R/W
Figure 3. SPI Timing (Using SPI Settings Typically Identified as CPOL = 1, CPHA = 1)
3
2
DB14
t
DAV
t
DSU
3
A5
DB13
(SMPL_PRD[7:0] ≤ 0x07, f
Min
0.01
32
9
48.8
24.4
48.8
5
Figure 2. SPI Chip Select Timing
4
t
DHD
1
A4
DB12
t
Rev. B | Page 5 of 20
DATARATE
Normal Mode
t
5
Typ
5
5
STALL
A3
DB11
6
A2
DB10
Max
2.5
100
12.5
12.5
S
≥ 64 Hz)
1
Min
0.01
42
12
48.8
24.4
48.8
5
(SMPL_PRD[7:0] ≥ 0x08, f
D2
DB2
1
15
ADIS16260/ADIS16265
Low Power Mode
D1
DB1
Typ
5
5
16
LSB
LSB
t
SFS
S
Max
1.0
100
12.5
12.5
≤ 56.9 Hz)
1
Unit
MHz
µs
µs
ns
ns
ns
ns
ns
ns
ns