S29AL016D70TFI020 Spansion Inc., S29AL016D70TFI020 Datasheet - Page 23

Flash Memory IC

S29AL016D70TFI020

Manufacturer Part Number
S29AL016D70TFI020
Description
Flash Memory IC
Manufacturer
Spansion Inc.
Datasheet

Specifications of S29AL016D70TFI020

Memory Size
16Mbit
Memory Configuration
2M X 8 / 1M X 16
Ic Interface Type
Parallel
Access Time
70ns
Memory Case Style
TSOP
No. Of Pins
48
Operating Temperature Range
-40°C To +85°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Autoselect Command Sequence
Word/Byte Program Command Sequence
December 17, 2004 S29AL016D_00_A2
The autoselect command sequence allows the host system to access the manu-
facturer and devices codes, and determine whether or not a sector is protected.
Table 9
to that shown in
V
The autoselect command sequence is initiated by writing two unlock cycles, fol-
lowed by the autoselect command. The device then enters the autoselect mode,
and the system may read at any address any number of times, without initiating
another command sequence.
A read cycle at address XX00h retrieves the manufacturer code. A read cycle at
address XX01h returns the device code. A read cycle containing a sector address
(SA) and the address 02h in word mode (or 04h in byte mode) returns 01h if that
sector is protected, or 00h if it is unprotected. Refer to Tables
sector addresses.
The system must write the reset command to exit the autoselect mode and return
to reading array data.
The system may program the device by word or byte, depending on the state of
the BYTE# pin. Programming is a four-bus-cycle operation. The program com-
mand sequence is initiated by writing two unlock write cycles, followed by the
program set-up command. The program address and data are written next, which
in turn initiate the Embedded Program algorithm. The system is not required to
provide further controls or timings. The device automatically generates the pro-
gram pulses and verifies the programmed cell margin.
and data requirements for the byte program command sequence.
When the Embedded Program algorithm is complete, the device then returns to
reading array data and addresses are no longer latched. The system can deter-
mine the status of the program operation by using DQ7, DQ6, or RY/BY#. See
Write Operation Status
Any commands written to the device during the Embedded Program Algorithm
are ignored. Note that a hardware reset immediately terminates the program-
ming operation. The Byte Program command sequence should be reinitiated once
the device has reset to reading array data, to ensure data integrity.
Programming is allowed in any sequence and across sector boundaries. A bit
cannot be programmed from a “0” back to a “1”. Attempting to do so may
halt the operation and set DQ5 to “1,” or cause the Data# Polling algorithm to
indicate the operation was successful. However, a succeeding read will show that
the data is still “0”. Only erase operations can convert a “0” to a “1”.
ID
on address bit A9.
shows the address and data requirements. This method is an alternative
Table
P r e l i m i n a r y
4, which is intended for PROM programmers and requires
for information on these status bits.
S29AL016D
Table 9
shows the address
2
and
3
for valid
23

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