HSP50214BVC Intersil, HSP50214BVC Datasheet - Page 23

• Manufacturer Part Number: HSP50214BVC
• Description: IC's, Microprocessor Support
• Manufacturer: Intersil

Specifications of HSP50214BVC

• No. Of Pins: 120
• Mounting Type: Surface Mount
• No. Of Channels: 1
• Package / Case: 120-MQFP

†
Using AGC loop gain, the AGC range, and expected error
detector output, the gain adjustments per output sample for
the Loop Filter Section of the Digital AGC can be given by:
AGC Slew Rate
Controlled via microprocessor interface.
(11 MANTISSA
4 EXPONENT)
IFIR
QFIR
SERIAL
OUT
μP
CONTROL WORD 9 BIT:
16
=
16
26
26
1.5dB THRESH
(
M
LG
MSB = 0
) 2
(
(
–
FORMAT
4
MSB = 0
) 2
⎛
⎝
4
23
18
EXP=2
–
AGC MULTIPLIER/SHIFTER
(
18
15 E
EN
–
–
(
20
NNNN
MAG*1.64676
LG
LOAD
AGC LOOP FILTER
AGC
27
e
)
⎞
⎠
16
M
U
X
26
MANTISSA =
01.XXXXXXXXXXXXXX
TABLE 6C. AGC LIMIT DATA FORMAT
e
FIGURE 23. AGC BLOCK DIAGRAM
) ) ×
LIMIT
DET
LIMIT
(EQ. 18)
DET
25
e
μP
LOWER LIMIT
LIMIT
HSP50214B
UPPER LIMIT
DET
(RANGE = -2.18344 TO 2.18344)
IAGC
18
+
QAGC
24
e
18
†
†
The loop gain determines the growth rate of the sum in the
loop accumulator which, in turn, determines how quickly the
AGC gain traces the transfer function given in Figures 21
and 22. Since the log of the gain response is roughly linear,
the loop response can be approximated by multiplying the
maximum AGC gain error by the loop gain. The expected
23
m
INTERPOLATING
RESAMPLING
AGCGNSEL
FIR FILTERS
HALFBAND
13
22
FILTERS
m
AND
AGC ERROR SCALING
21
EXP
m
(RANGE = 0 TO 1)
4
20
m
(RANGE = 0 TO 2.3)
MANTISSA
4
19
m
COORDINATE
CONVERTER
(G = 1.64676)
CARTESIAN
MAGNITUDE
POLAR
TO
18
m
DETECTOR
ERROR
AGC
Δ
13
17
m
May 1, 2007
FN4450.4
16
m