SST25VF016B-75-4I-QAF SILICON STORAGE TECHNOLOGY, SST25VF016B-75-4I-QAF Datasheet - Page 16

• Manufacturer Part Number: SST25VF016B-75-4I-QAF
• Description: MEMORY, FLASH, 16MBIT, SPI, 8WSON
• Manufacturer: SILICON STORAGE TECHNOLOGY

Specifications of SST25VF016B-75-4I-QAF

• Memory Size: 16Mbit
• Clock Frequency: 75MHz
• Supply Voltage Range: 2.7V To 3.6V
• Memory Case Style: WSON
• No. Of Pins: 8
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (18-Jun-2010)
• Memory Type: Flash
• Memory Configuration: 2M X 8
• Interface Type: Serial, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

A Microchip Technology Company
©2011 Silicon Storage Technology, Inc.
32-KByte and 64-KByte Block-Erase
The 32-KByte Block-Erase instruction clears all bits in the selected 32 KByte block to FFH. A Block-
Erase instruction applied to a protected memory area will be ignored. The 64-KByte Block-Erase instruc-
tion clears all bits in the selected 64 KByte block to FFH. A Block-Erase instruction applied to a protected mem-
ory area will be ignored. Prior to any Write operation, the Write-Enable (WREN) instruction must be executed.
CE# must remain active low for the duration of any command sequence. The 32-Kbyte Block-Erase
instruction is initiated by executing an 8-bit command, 52H, followed by address bits [A
bits [A
address bits can be V
Erase instruction is initiated by executing an 8-bit command D8H, followed by address bits [A
[A
driven high before the instruction is executed. The user may poll the Busy bit in the software status register or
wait T
cycles. See Figures 13 and 14 for the 32-KByte Block-Erase and 64-KByte Block-Erase sequences.
Figure 13:32-KByte Block-Erase Sequence
Figure 14:64-KByte Block-Erase Sequence
MS
-A
BE
MS
15
] are used to determine block address (BA
-A
for the completion of the internal self-timed 32-KByte Block-Erase or 64-KByte Block-Erase
15
] (A
MS
= Most Significant Address) are used to determine block address (BA
IL
SCK
or V
CE#
SO
SCK
SI
CE#
SO
SI
IH.
MODE 3
MODE 0
CE# must be driven high before the instruction is executed. The 64-Kbyte Block-
MODE 3
MODE 0
MSB
0 1 2 3 4 5 6 7 8
MSB
0 1 2 3 4 5 6 7 8
16
52
D8
HIGH IMPEDANCE
X
HIGH IMPEDANCE
), remaining address bits can be V
MSB
ADDR
MSB
16 Mbit SPI Serial Flash
ADDR
15 16
15 16
ADDR
ADDR
23 24
23 24
1271 32KBklEr.0
ADDR
1271 63KBlkEr.0
ADDR
31
31
SST25VF016B
IL
or V
23
S71271-04-000
-A
23
IH.
0
-A
X
]. Address bits
CE# must be
), remaining
Data Sheet
0
]. Address
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