LP2975AIMM-5.0 National Semiconductor, LP2975AIMM-5.0 Datasheet - Page 14

• Manufacturer Part Number: LP2975AIMM-5.0
• Description: IC, LDO VOLT REG, 5V, 5A, 8-SOIC
• Manufacturer: National Semiconductor

Specifications of LP2975AIMM-5.0

• Primary Input Voltage: 24V
• Output Voltage Fixed: 5V
• Dropout Voltage Vdo: 323mV
• No. Of Pins: 8
• Output Current: 5A
• Operating Temperature Range: -40°C To +125°C
• Device Type: LDO
• Termination Type: SMD
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

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Application Hints
The ESR of the output capacitor is very important for stabil-
ity, as it creates a zero (f
shift resulting from one of the poles present in the loop. The
frequency of the zero is calculated from:
For best results in most designs, the frequency of f
fall between 5 kHz and 50 kHz. It must be noted that the
values of C
(severely in the case of aluminum electrolytics), and this
must be taken into consideration.
For the design example (V
which meets the f
ESR yields:
Assuming f
for the 180 µF capacitor are found to be:
A good-quality, low-ESR capacitor type such as the Pana-
sonic HFQ is a good choice. However, the 10V/180 µF
capacitor (#ECA-1AFQ181) has an ESR of 0.3Ω which is not
in the desired range.
To assure a stable design, some of the options are:
1) Use a different type capacitor which has a lower ESR
such as an organic-electrolyte OSCON.
2) Use a higher voltage capacitor. Since ESR is inversely
proportional to the physical size of the capacitor, a higher
voltage capacitor with the same C value will typically have a
lower ESR (because of the larger case size). In this ex-
ample, a Panasonic ECA-1EFQ181 (which is a 180 µF/25V
part) has an ESR of 0.17Ω and would meet the desired ESR
range.
3) Use a feed-forward capacitor (see next section).
Feed-Forward Capacitor
Although not required in every application, the use of a
feed-forward capacitor (C
phase margin and transient response in most designs.
The added phase margin provided by C
lations in cases where the required value of C
can not be easily obtained (see previous section).
C
from the Gate capacitance, stabilizing applications where
this pole occurs at a low frequency (before cross-over) which
would cause oscillations if left uncompensated (see later
section GATE CAPACITANCE POLE FREQUENCY).
Even in a stable design, adding C
optimal loop response (faster settling time). For these rea-
sons, the use of a feed-forward capacitor is always rec-
ommended.
C
set the output voltage (see Typical Application Circuit). This
forms a zero in the loop response (defined as f
frequency is:
When solved for C
For most applications, f
50 kHz.
F
F
is connected across the top resistor in the divider used to
can also reduce the phase shift due to the pole resulting
f
C
zf
F
z
= 6.6 x 10
= 6.6 x 10
OUT
= 5 kHz and 50 kHz, the limiting values of ESR
f
ESR = 0.16 / (f
and ESR usually vary with temperature
z
18 mΩ ≤ ESR ≤ 0.18Ω
z
F
= 0.16 / (ESR x C
, the f
requirements. Solving the equation for
−6
−6
zf
z
/ [C
) which cancels much of the phase
/ [f
F
should be set between 5 kHz and
zf
OUT
) can yield improvements in both
equation is:
zf
F
= 5V
x (V
x (V
(Continued)
z
F
x C
OUT
OUT
will typically provide more
@
OUT
1A), select a capacitor
OUT
/ 1.24 − 1) ]
/ 1.24 − 1) ]
F
)
)
can prevent oscil-
OUT
zf
and ESR
), whose
z
should
14
ADJUSTING THE OUTPUT VOLTAGE
If an output voltage is required which is not available as a
standard voltage, the LP2975 can be used as an adjustable
regulator (see Typical Application circuit). The external resis-
tors R1 and R2 (along with the internal 24 kΩ resistor) set
the output voltage.
It is important to note that R2 is connected in parallel with the
internal 24 kΩ resistor. If we define R
tance between the COMP pin and ground, then its value
will be the parallel combination of R2 and 24 kΩ:
It follows that the output voltage will be:
Some important considerations for an adjustable design:
The tolerance of the internal 24 kΩ resistor is about
Also, its temperature coefficient is almost certainly different
than the TC of the external resistor that is used for R2.
For these reasons, it is recommended that R2 be set at a
value that is not greater than 1.2k. In this way, the value of
R2 will dominate R
internal 24k resistor will have a negligible effect on output
voltage accuracy.
To determine the value for R1:
External Capacitors (Adjustable Application)
All information in the previous section EXTERNAL CAPACI-
TORS applies to the adjustable application with the excep-
tion of how to select the value of the feed-forward capacitor.
The feed-forward capacitor C
(see Typical Application Circuit) performs exactly the same
function as described in the previous section FEEDFOR-
WARD CAPACITOR. However, because R1 is user-
selected, a different formula must be used to determine the
value of C
As stated previously, the optimal frequency at which to place
the zero f
OPTIMIZING DESIGN STABILITY
Because the LP2975 can be used with a variety of different
applications, there is no single set of components that are
best suited to every design. This section provides informa-
tion which will enable the designer to select components that
optimize stability (phase margin) for a specific application.
Gate Capacitance
An important consideration of a design is to identify the
frequency of the pole which results from the capacitance of
the Gate of the FET (this pole will be referred to as f
f
margin is reduced. Information will now be provided to allow
the total Gate capacitance to be calculated so that f
approximated.
The first step in calculating fp is to determine how much
effective Gate capacitance (C
for calculating C
Where:
C
from the values (refer to FET data sheet for values of C
and C
pg
GS
gets closer to the loop crossover frequency, the phase
is the Gate-to-Source capacitance, which is found
RSS
C
zf
):
C
EFF
:
is usually between 5 kHz and 50 kHz.
R
= C
V
R1 = R
EQ
EFF
OUT
C
GS
= (R2 x 24k) / (R2 + 24k)
C
EQ
is:
= 1.24 [ (R1 / R
= 1 / (2 π x R1 x f
+ C
EQ
, and the tolerance and TC of the
GD
[ (V
[1 + G
OUT
C
in the adjustable application
EFF
/ 1.24) − 1]
) is present. The formula
m
EQ
(R
EQ
) + 1]
zf
L
as the total resis-
)
/ / ESR) ]
pg
pg
can be
±
20%.
). As
ISS