LT3050EDDB#PBF Linear Technology, LT3050EDDB#PBF Datasheet - Page 15

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LT3050EDDB#PBF

Manufacturer Part Number
LT3050EDDB#PBF
Description
IC ADJ LDO REG 0.6V TO 44.5V 0.1A DFN-12
Manufacturer
Linear Technology
Datasheet

Specifications of LT3050EDDB#PBF

Primary Input Voltage
45V
Output Voltage Adjustable Range
0.6V To 44.5V
Dropout Voltage Vdo
340mV
No. Of Pins
12
Output Current
100mA
Operating Temperature Range
-40°C To +125°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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OPERATION
I
The I
LT3050 output PNP at a ratio of 1:100 (see block diagram
on page 11). The current sourced by the I
~1/100
I
operating in dropout. If the I
are not the same, the ratio deviates from 1/100 due to
the Early voltages of the I
to the equation:
where the Early voltage of the PNPs is 70V and I
a variable which represents the I
I
empirically derived equation:
The I
use by monitoring circuitry simply by connecting the I
pin to a resistor.
Connecting a resistor from I
I
circuitry such as an ADC.
For example, a 1.2k resistor results in a I
of 1.2V for an output current of 100mA and an output
voltage of 1.2V.
The output current of the device can be calculated from
the I
MON
MON
MONR
MON
I
≥0.5
I
I
I
MONR
MONR
OUT
IMON
I
OUT
MON
MON
MON
and OUT pin voltages are equal and the device is not
Pin Operation (Current Monitor)
pin current into a voltage that can be monitored by
varies with V
th
pin voltage by the following equation:
of the current sourced by the OUT pin when the
= 97 + 5 • log
= 96 + 2 • (V
pin is the collector of a PNP which mirrors the
pin current can be converted into a voltage for
I MON
I OUT
I
I
{
MONR
MONR
1
Ratio
Early Voltage Compensation
IN
R
1 2 3
1
V
I IMON
IN
70 V
IMON
IMON
10
to V
70 V
44 4
– V
(1+V
MON
OUT
OUT
IN
MON
IN
2
MON
Early VoltageCompensation
IN
and OUT PNPs according
1
) for (V
voltage according to the
OUT
70 V
444
– V
70 V
V
44 4
V
and OUT pin voltages
IMON
to GND converts the
OUT
to I
OUT
IN
3
IN
MON
IN
) for (V
2
MON
– V
444
V
current ratio.
V
OUT
IMON
OUT
MON
pin voltage
IN
) < 0.5
3
MONR
– V
pin is
OUT
MON
is
)
A small decoupling capacitor (22nF minimum) from I
to GND is required to improve I
rejection. If the current monitor is not needed, it must be
tied to GND.
Open Circuit Detection (I
The I
LT3050 output at a ratio of approximately 1:200 (see block
diagram on page 11). The I
the FAULT pin if the I
low output current fault threshold voltage (I
by attaching a resistor from I
This equation is empirically derived and partially
compensates for early voltage effects in the I
mirror. It is valid for an input voltage range from 0.6V
above the output to 10V above the output. It is valid for
output voltages up to 12V. The accuracy of this equation
for setting the resistor value is approximately ±2%. Unit
values are Amps, Volts, and Ohms.
If the open circuit detection function is not needed, the I
pin must be left fl oating (unconnected). A small decoupling
capacitor (10nF minimum) from I
to improve I
FAULT pin glitches.
See the Typical Performance Characteristics section for
additional information.
R
IMIN
MIN
pin is the collector of a PNP which mirrors the
=
119 85
MIN
.
pin power supply rejection and to prevent
– ( .
MIN
1 68 36 8
MIN
pin voltage is below 0.6V. This
I
MIN
OPEN
MIN
Pin)
LT3050 Series
. •
fault comparator asserts
to GND.
MON
MIN
I
OPEN
to GND is required
pin power supply
) •
V
OPEN
OUT
MIN
15
current
) is set
MON
3050fa
MIN

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