PIC18F452I/L Microchip Technology, PIC18F452I/L Datasheet - Page 114

• Manufacturer Part Number: PIC18F452I/L
• Description: IC, 8BIT MCU, PIC18F, 40MHZ, LCC-44
• Manufacturer: Microchip Technology

Specifications of PIC18F452I/L

• Controller Family/series: PIC18
• No. Of I/o's: 34
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 1.5KB
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Core Size: 8 Bit
• Program Memory Size: 16 KWords
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18FXX2
12.2
The Timer2 module has an 8-bit period register, PR2.
Timer2 increments from 00h until it matches PR2 and
then resets to 00h on the next increment cycle. PR2 is
a readable and writable register. The PR2 register is
initialized to FFh upon RESET.
FIGURE 12-1:
TABLE 12-1:
DS39564C-page 112
INTCON GIE/GIEH PEIE/GIEL
PIR1
PIE1
IPR1
TMR2
T2CON
PR2
Legend: x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by the Timer2 module.
Note 1: The PSPIF, PSPIE and PSPIP bits are reserved on the PIC18F2X2 devices; always maintain these bits clear.
Name
Timer2 Interrupt
Timer2 Module Register
Timer2 Period Register
Note 1: TMR2 register output can be software selected by the SSP Module as a baud clock.
PSPIE
PSPIP
PSPIF
F
OSC
Bit 7
—
/4
(1)
(1)
(1)
REGISTERS ASSOCIATED WITH TIMER2 AS A TIMER/COUNTER
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000
TIMER2 BLOCK DIAGRAM
ADIF
ADIE
ADIP
Bit 6
T2CKPS1:T2CKPS0
1:1, 1:4, 1:16
Prescaler
TMR0IE
RCIE
RCIP
RCIF
Bit 5
2
INT0IE
Bit 4
TXIF
TXIE
TXIP
Comparator
TMR2
PR2
SSPIE
SSPIP
SSPIF
RBIE
Bit 3
RESET
EQ
12.3
The output of TMR2 (before the postscaler) is fed to the
Synchronous Serial Port module, which optionally uses
it to generate the shift clock.
TMR0IF
CCP1IE
CCP1IP
CCP1IF
TOUTPS3:TOUTPS0
Bit 2
Postscaler
1:1 to 1:16
Output of TMR2
Output
TMR2
TMR2IF
TMR2IE
TMR2IP
INT0IF
4
Bit 1
(1)
TMR1IE
TMR1IP
TMR1IF
Bit 0
RBIF
© 2006 Microchip Technology Inc.
bit TMR2IF
Sets Flag
0000 000x 0000 000u
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
1111 1111 1111 1111
POR, BOR
Value on
Value on
All Other
RESETS