S29GL128P10FFI010 Spansion Inc., S29GL128P10FFI010 Datasheet - Page 76

• Manufacturer Part Number: S29GL128P10FFI010
• Description: IC, FLASH, 128MBIT, 100NS, BGA-64
• Manufacturer: Spansion Inc.

Specifications of S29GL128P10FFI010

• Memory Type: Flash
• Memory Size: 128Mbit
• Memory Configuration: 16M X 8 / 8M X 16
• Ic Interface Type: CFI, Parallel
• Access Time: 100ns
• Supply Voltage Range: 2.7 To 3.6 V
• Memory Case Style: BGA
• Cell Type: NOR
• Density: 128Mb
• Access Time (max): 100ns
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 24/23Bit
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: Fortified BGA
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 16M/8M
• Supply Current: 110mA
• Mounting: Surface Mount
• Pin Count: 64
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13. Advance Information on S29GL-R 65 nm MirrorBit Hardware
76
Reset (RESET#) and Power-up Sequence
Note
CE#, OE# and WE# must be at logic high during Reset Time.
Note
The sum of t
Notes
1. V
2. V
3. Maximum V
Note
The sum of t
Parameter
Parameter
RESET#
does not permit any read and write operations, valid read operations return FFh, and a hardware reset is required.
t
t
t
t
IO
IO
VIOS
RPH
t
t
VCS
RPH
t
t
RP
RH
RP
RH
CE#
< V
and V
V
V
CC
IO
CC
RP
RP
CC
+ 200 mV.
RESET# Low to CE# Low
RESET# Pulse Width
Time between RESET# (high) and CE# (low)
V
V
RESET# Low to CE# Low
RESET# Pulse Width
Time between RESET# (high) and CE# (low)
CC
and t
and t
CC
IO
ramp must be in sync during power-up. If RESET# is not stable for 300 µs, the following conditions may occur: the device
power up current is 20 mA (RESET# =V
Setup Time to first access
Setup Time to first access
RH
RH
RESET#
must be equal to or greater than t
must be equal to or greater than t
CE#
S29GL-P MirrorBit
Table 13.2 Power-Up Sequence Timings
Table 13.1 Hardware Reset (RESET#)
Figure 13.2 Power-On Reset Timings
Figure 13.1 Reset Timings
Description
Description
t
RP
RPH
RPH
D a t a
IL
t
).
®
t
.
VIOS
.
VCS
Flash Family
t
RPH
S h e e t
t
RP
t
RH
t
RPH
S29GL-P_00_A13 November 17, 2010
t
RH
Limit
Limit
Min
Min
Min
Min
Min
Min
Min
Min
Time
Time
200
200
300
300
200
200
35
35
Unit
Unit
µs
ns
ns
µs
µs
µs
ns
ns