STA339BWS13TR STMicroelectronics, STA339BWS13TR Datasheet - Page 20

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STA339BWS13TR

Manufacturer Part Number
STA339BWS13TR
Description
DIG AUDIO SYSTEM, 2-CH, 36POWERSSOP
Manufacturer
STMicroelectronics
Datasheet

Specifications of STA339BWS13TR

Svhc
No SVHC (15-Dec-2010)
No. Of Pins
36
Operating Temperature Range
-20°C To +70°C
Supply Voltage Max
21.5V
Supply Voltage Min
4.5V
Termination
RoHS Compliant
Package / Case
PowerSSO
Interface
I2C
Interface Type
I2C
Rohs Compliant
Yes

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I
5.3
5.3.1
5.3.2
5.4
5.4.1
5.4.2
5.4.3
20/76
2
C bus specification
Write operation
Following the START condition the master sends a device select code with the RW bit set
to 0. The STA339BWS acknowledges this and then waits for the byte of internal address.
After receiving the internal byte address the STA339BWS again responds with an
acknowledgement.
Byte write
In the byte write mode the master sends one data byte, this is acknowledged by the
STA339BWS. The master then terminates the transfer by generating a STOP condition.
Multi-byte write
The multi-byte write modes can start from any internal address. The master generating a
STOP condition terminates the transfer.
Figure 8.
Read operation
Current address byte read
Following the START condition the master sends a device select code with the RW bit set
to 1. The STA339BWS acknowledges this and then responds by sending one byte of data.
The master then terminates the transfer by generating a STOP condition.
Current address multi-byte read
The multi-byte read modes can start from any internal address. Sequential data bytes are
read from sequential addresses within the STA339BWS. The master acknowledges each
data byte read and then generates a STOP condition terminating the transfer.
Random address byte read
Following the START condition the master sends a device select code with the RW bit set
to 0. The STA339BWS acknowledges this and then the master writes the internal address
byte. After receiving, the internal byte address the STA339BWS again responds with an
acknowledgement. The master then initiates another START condition and sends the device
select code with the RW bit set to 1. The STA339BWS acknowledges this and then
responds by sending one byte of data. The master then terminates the transfer by
generating a STOP condition.
MULTIBYTE
MULTIBYTE
WRITE
WRITE
WRITE
WRITE
BYTE
BYTE
START
START
START
START
Write mode sequence
DEV-ADDR
DEV-ADDR
DEV-ADDR
DEV-ADDR
RW
RW
RW
RW
ACK
ACK
ACK
ACK
Doc ID 15276 Rev 3
SUB-ADDR
SUB-ADDR
SUB-ADDR
SUB-ADDR
ACK
ACK
ACK
ACK
DATA IN
DATA IN
DATA IN
DATA IN
ACK
ACK
ACK
ACK
STOP
STOP
DATA IN
DATA IN
STA339BWS
ACK
ACK
STOP
STOP

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