DSPIC30F4012-20I/SO Microchip Technology, DSPIC30F4012-20I/SO Datasheet - Page 25

• Manufacturer Part Number: DSPIC30F4012-20I/SO
• Description: IC, DSC, 16BIT, 48KB 20MHZ, 5.5V, SOIC28
• Manufacturer: Microchip Technology
• Series: DsPIC30Fr

Specifications of DSPIC30F4012-20I/SO

• Core Frequency: 20MHz
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 20
• Flash Memory Size: 48KB
• Supply Voltage Range: 2.5V To 5.5V
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 48KB (16K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Package: 28SOIC W
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 20
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 6-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F401220ISO

3.0
3.1
The program address space is 4M instruction words. It
is addressable by the 23-bit PC, table instruction
Effective Address (EA) or data space EA, when
program space is mapped into data space as defined
by
incremented by two between successive program
words in order to provide compatibility with data space
addressing.
User program space access is restricted to the lower
4M instruction word address range (0x000000 to
0x7FFFFE) for all accesses other than TBLRD/TBLWT,
which use TBLPAG<7> to determine user or configura-
tion space access. In
bit 23 allows access to the Device ID, the User ID and
the Configuration bits; otherwise, bit 23 is always clear.
© 2010 Microchip Technology Inc.
Note:
Table
MEMORY ORGANIZATION
Program Address Space
3-1. Note that the program space address is
This data sheet summarizes features of
this group of dsPIC30F devices and is not
intended to be a complete reference
source. For more information on the CPU,
peripherals, register descriptions and
general device functionality, refer to the
“dsPIC30F Family Reference Manual”
(DS70046). For more information on the
device instruction set and programming,
refer to the “16-bit MCU and DSC
Reference Manual” (DS70157).
Table
3-1, read/write instructions,
FIGURE 3-1:
dsPIC30F4011/4012
Reset – GOTO Instruction
Reset – Target Address
Alternate Vector Table
Interrupt Vector Table
Device Configuration
Program Memory
(16K instructions)
UNITID (32 instr.)
Data EEPROM
PROGRAM SPACE
MEMORY MAP FOR
dsPIC30F4011/4012
DEVID (2)
User Flash
(Read ‘0’s)
Reserved
Registers
Reserved
Reserved
Reserved
(1 Kbyte)
Reserved
DS70135G-page 25
000000
000002
000004
00007E
000080
000084
0000FE
000100
007FFE
008000
7FFBFE
7FFC00
7FFFFE
800000
8005BE
8005C0
8005FE
800600
F7FFFE
F80000
F8000E
F80010
FEFFFE
FF0000
FFFFFE
Vector Tables