W25Q64CVSSIG Winbond Electronics, W25Q64CVSSIG Datasheet - Page 57

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W25Q64CVSSIG

Manufacturer Part Number
W25Q64CVSSIG
Description
IC SPI FLASH 64MBIT 8-SOIC
Manufacturer
Winbond Electronics
Datasheet

Specifications of W25Q64CVSSIG

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
64M (8M x 8)
Speed
80MHz
Interface
SPI Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (0.083", 2.10mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q5822008

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
W25Q64CVSSIG
Manufacturer:
WINBOND/华邦
Quantity:
20 000
Company:
Part Number:
W25Q64CVSSIG
Quantity:
15
11.2.37 Program Security Registers (42h)
The Program Security Register instruction is similar to the Page Program instruction. It allows from one
byte to 256 bytes of security register data to be programmed at previously erased (FFh) memory
locations. A Write Enable instruction must be executed before the device will accept the Program Security
Register Instruction (Status Register bit WEL= 1). The instruction is initiated by driving the /CS pin low
then shifting the instruction code “42h” followed by a 24-bit address (A23-A0) and at least one data byte,
into the DI pin. The /CS pin must be held low for the entire length of the instruction while data is being
sent to the device.
The Program Security Register instruction sequence is shown in figure 36. The Security Register Lock
Bits (LB3-0) in the Status Register-2 can be used to OTP protect the security registers. Once a lock bit is
set to 1, the corresponding security register will be permanently locked, Program Security Register
instruction to that register will be ignored (See 11.1.9, 11.2.21 for detail descriptions).
*
recommended to use Security registers 1- 3 before using register 0
Please note that Security Register 0 is Reserved by Winbond for future use. It is
Security Register #0*
Security Register #1
Security Register #2
Security Register #3
ADDRESS
Instruction (42h)
Figure 36. Program Security Registers Instruction Sequence
A23-16
00h
00h
00h
00h
- 57 -
A15-12
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
Publication Release Date: January 4, 2010
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
A11-8
.
Preliminary - Revision B
W25Q64CV
Byte Address
Byte Address
Byte Address
Byte Address
A7-0

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