BLF6G13L-250P,112 NXP Semiconductors, BLF6G13L-250P,112 Datasheet - Page 5

• Manufacturer Part Number: BLF6G13L-250P,112
• Description: TRANS LDMOS SOT1121A
• Manufacturer: NXP Semiconductors

Specifications of BLF6G13L-250P,112

• Voltage - Rated: 100V
• Transistor Type: LDMOS (Dual)
• Frequency: 1.3GHz
• Gain: 15dB
• Current Rating: 42A
• Current - Test: 100mA
• Voltage - Test: 50V
• Power - Output: 250W
• Package / Case: *
• Channel Type: N
• Channel Mode: Enhancement
• Continuous Drain Current: 42A
• Drain Source Voltage (max): 100V
• Output Power (max): 250W(Min)
• Power Gain (typ)@vds: 15@50VdB
• Package Type: CDFM
• Pin Count: 5
• Drain Source Resistance (max): 340@6Vmohm
• Operating Temp Range: -65C to 200C
• Drain Efficiency (typ): 50%
• Mounting: Screw
• Mode Of Operation: CW
• Number Of Elements: 2
• Vswr (max): 5
• Screening Level: Military
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Noise Figure: -
• Lead Free Status / Rohs Status: Compliant

NXP Semiconductors
BLF6G13L-250P_6G13LS-250P
Objective data sheet
Fig 3.
(dB)
G
(1) I
(2) I
(3) I
(4) I
(5) I
(6) I
(7) I
(8) I
p
21
18
15
12
0
V
Power gain as a function of load power;
typical values
Dq
Dq
Dq
Dq
Dq
Dq
Dq
Dq
DS
= 100 MHz
= 300 MHz
= 500 MHz
= 700 MHz
= 900 MHz
= 1100 MHz
= 1300 MHz
= 1500 MHz
= 50 V; f = 1300 MHz; carrier spacing = 100 kHz.
50
7.3 Impedance information
Table 8.
Typical values valid per section unless otherwise specified.
100
f
MHz
1200
1300
1400
Fig 5.
(8)
(7)
(6)
(5)
(4)
(3)
(2)
(1)
150
Z

3.03  j8.15
4.06  j9.52
7.00  j9.61
Definition of transistor impedance
S
Typical impedance
BLF6G13L-250P; BLF6G13LS-250P
200
All information provided in this document is subject to legal disclaimers.
001aan870
P
L
(W)
250
Rev. 2 — 21 March 2011
Z

2.03  j0.25
1.67  j0.92
1.50  j1.48
L
optimized for G
gate 1
gate 2
Fig 4.
Z
S
IMD3
(dBc)
(1) I
(2) I
(3) I
(4) I
(5) I
(6) I
(7) I
(8) I
-10
-20
-30
-40
-50
-60
0
V
Third order intermodulation distortion as a
function of load power; typical values
Dq
Dq
Dq
Dq
Dq
Dq
Dq
Dq
drain 1
drain 2
DS
= 100 MHz
= 300 MHz
= 500 MHz
= 700 MHz
= 900 MHz
= 1100 MHz
= 1300 MHz
= 1500 MHz
p
Z
= 50 V; f = 1300 MHz; carrier spacing = 100 kHz.
L
50
001aak544
100
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
Z

1.46  j0.47
1.19  j0.95
1.22  j1.49
L
optimized for 
Power LDMOS transistor
150
200
© NXP B.V. 2011. All rights reserved.
001aan871
P
L
(W)
D
250
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