LFXP2-5E-5FTN256C Lattice, LFXP2-5E-5FTN256C Datasheet - Page 59

• Manufacturer Part Number: LFXP2-5E-5FTN256C
• Description: FPGA - Field Programmable Gate Array 5K LUTs 172I/O Inst- on DSP 1.2V -5 Spd
• Manufacturer: Lattice
• Series: LatticeXP2r

Specifications of LFXP2-5E-5FTN256C

• Number Of Macrocells: 5000
• Maximum Operating Frequency: 200 MHz
• Number Of Programmable I/os: 172
• Data Ram Size: 10 KB
• Supply Voltage (max): 1.14 V
• Supply Current: 17 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.26 V
• Package / Case: FTBGA-256
• No. Of Logic Blocks: 5000
• No. Of Macrocells: 2500
• Family Type: LatticeXP2
• No. Of Speed Grades: 5
• Total Ram Bits: 166Kbit
• No. Of I/o's: 172
• Clock Management: PLL
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Register-to-Register Performance (Continued)
Derating Timing Tables
Logic timing provided in the following sections of this data sheet and the ispLEVER design tools are worst case
numbers in the operating range. Actual delays at nominal temperature and voltage for best case process, can be
much better than the values given in the tables. The ispLEVER design tool can provide logic timing numbers at a
particular temperature and voltage.
DSP IP Functions
16-Tap Fully-Parallel FIR Filter
1024-pt FFT
8X8 Matrix Multiplication
1. These timing numbers were generated using the ispLEVER design tool. Exact performance may vary with device, design and tool version.
Timing v. A 0.12
The tool uses internal parameters that have been characterized but are not tested on every device.
Function
3-15
DC and Switching Characteristics
LatticeXP2 Family Data Sheet
-7 Timing
198
221
196
Units
MHz
MHz
MHz