PCA9507DP,118 NXP Semiconductors, PCA9507DP,118 Datasheet - Page 6

• Manufacturer Part Number: PCA9507DP,118
• Description: I/O Expanders, Repeaters & Hubs LEVEL TRANSL I2C BUS
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of PCA9507DP,118

• Logic Family: SDA, SCL
• Propagation Delay Time: 218 ns
• Operating Supply Voltage: 2.7 V to 5.5 V
• Power Dissipation: 100 mW
• Operating Temperature Range: - 40 C to + 85 C
• Logic Type: I2C Bus
• Mounting Style: SMD/SMT
• Output Current: 50 mA
• Output Voltage: 0.52 V
• Package / Case: TSSOP-8
• Mounting Type: Surface Mount
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Interface: I²C, SMBus
• Number Of I /o: 24
• Frequency - Clock: 400kHz
• Interrupt Output: No
• Includes: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935285824118 PCA9507DP-T

NXP Semiconductors
PCA9507_1
Product data sheet
6.3.2 Port B (SDAB and SCLB)
SDAB and SCLB are standard I
accelerator. The static level offset produces an output LOW of 0.5 V (typical) at 6 mA. As
with the standard I
levels. The size of these pull-up resistors depends on the system requirement, and should
meet the current sinking capability of the device that drives the buffer, as well as that of
the buffer. The minimum and maximum pull-up resistors are determined and the pull-up
resistor’s value is chosen to be within the minimum and maximum range.
Using
R
Where:
The maximum pull-up resistor should also be sized such that the RC time constant meets
the standard I
Fast-mode (400 kHz). DDC bus complies with the I
below 100 kHz, and maximum rise time is 1 s using a simplified RC equation.
Using
Where:
The chosen pull-up resistor R
R
PU min
PU max
R
V
0.4 V is the maximum V
I
on logic LOW.
R
meet the I
C
the line, and the buffer) in order to meet the rise time specification.
t
speed 400 kHz or lower).
OL(max)
r
CC(B)(max)
PU(min)
PU(max)
L(max)
is the rise time specified as 1 s (for bus speed 100 kHz or lower) and 300 ns (for bus
Equation
Equation
=
is the maximum allowable capacitance load (include the capacitance of driver,
at V
is the minimum pull-up resistor value for the open-drain SCLB and SDAB.
is the maximum allowable pull-up resistor on the SCLB and SDAB in order to
C
V
------------------------------------------------ -
2
L max
C-bus rise time specification.
is the maximum supply rail of the pull-up resistor.
CC B max
2
OL
C-bus rise time, which is 1 s for Standard-mode (100 kHz) or 300 ns for
1, calculate the minimum pull-up resistor value:
2, calculate the maximum pull-up resistor value:
= 0.4 V is the maximum sink current of the device that drives the buffer
I
OL max
2
C-bus system, pull-up resistors are required to provide the logic HIGH
=
1.2 t
Rev. 01 — 7 February 2008
–
2-wire serial bus extender for HDMI DDC I
0.4 V
OL
r
of the device that drives the buffer on logic LOW.
PU
2
C-bus with static level offset that has no rise time
is: R
PU(min)
R
PU
2
C-bus Standard-mode and operates
R
PU(max)
.
2
PCA9507
C-bus and SMBus
© NXP B.V. 2008. All rights reserved.
6 of 20
(1)
(2)