CLC021VGZ-5.0 National Semiconductor, CLC021VGZ-5.0 Datasheet - Page 13

• Manufacturer Part Number: CLC021VGZ-5.0
• Description: IC SERIALIZER VIDEO DGTL 44-PQFP
• Manufacturer: National Semiconductor

Specifications of CLC021VGZ-5.0

• Function: Serializer
• Data Rate: 400Mbps
• Input Type: HCMOS/LSTTL
• Output Type: CMOS, TTL
• Number Of Inputs: 10
• Number Of Outputs: 1
• Voltage - Supply: 5V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 44-QFP
• For Use With: SD021-5EVK - BOARD EVALUATION CLC021AVGZ-5.0
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *CLC021VGZ-5.0

Pin Descriptions
Note: All CMOS/TTL inputs have internal pull-down devices.
Pin
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
1
2
3
4
5
6
7
8
9
Reset
NRZ-NRZI
Test Out
V
V
V
V
EDH Force
EDH Enable
SMPTE Mode
N/C
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
P
H/Line-Field b0 (LSB)
V/Line-Field b1
F/Line-Field b2 (MSB)
Lock Detect
V
V
TPG Enable
V
V
V
V
N/C
R
V
V
SDO
SDO
V
Sync Detect Enable
NSP
ANC
NTSC/PAL
SS
SS
DD
DD
CLK
SSO
DDO
SSOD
SSOD
DDOD
DDOD
DDOD
SSSD
DDSD
REF
Name
Description
Manual Reset Input (High True)
NRZ-to-NRZI Conversion Control (NRZ=High, NRZI=Low)
Test Out (BIST Pass/Fail Indicator)
Negative Power Supply Input (Digital Logic)
Negative Power Supply Input (Digital Logic)
Positive Power Supply Input (Digital Logic)
Positive Power Supply Input (Digital Logic)
Force Insertion of New EDH and Flags in Serial Output Data (High True)
EDH Enable Input (Low True)
SMPTE/non-SMPTE Mode Select Input (SMPTE Mode=Low)
No Connect
Parallel Data Input (Internal Pull-Down to V
Parallel Data Input (Internal Pull-Down to V
Parallel Data Input (Internal Pull-Down to V
Parallel Data Input (Internal Pull-Down to V
Parallel Data Input (Internal Pull-Down to V
Parallel Data Input (Internal Pull-Down to V
Parallel Data Input (Internal Pull-Down to V
Parallel Data Input (Internal Pull-Down to V
Parallel Data Input (Internal Pull-Down to V
Parallel Data Input (Internal Pull-Down to V
Parallel Clock Input (Internal Pull-Down to V
H-Bit Output (Component); Line-Field ID (Composite)
V-Bit Output (Component); Line-Field ID (Composite)
F-Bit Output (Component); Line-Field ID (Composite)
Lock Detector Output (High True)
Negative Power Supply Input (PLL Supply)
Positive Power Supply Input (PLL Supply)
TPG Enable (High True)
Negative Power Supply Input (PLL Digital Supply)
Negative Power Supply Input (PLL Digital Supply)
Positive Power Supply Input (PLL Digital Supply)
Positive Power Supply Input (PLL Digital Supply)
No Connect
Output Level Reference Resistor (1.69 kΩ, 1% Nominal Value)
Positive Power Supply Input (PLL Digital Supply)
Negative Power Supply Input (Output Driver)
Serial Data True Output
Serial Data Complement Output
Positive Power Supply Input (Output Driver)
Parallel Data Sync Detection Enable Input (Low True)
New Sync Position Output
Ancilliary Data Header Flag Output
NTSC/PAL Mode Indicator Output (PAL=High, NTSC=Low)
13
SS
SS
SS
SS
SS
SS
SS
SS
SS
SS
SS
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