ATA3741P3-TGQY Atmel, ATA3741P3-TGQY Datasheet - Page 4

IC UHF ASK/FSK RECEIVER 20SOIC

ATA3741P3-TGQY

Manufacturer Part Number
ATA3741P3-TGQY
Description
IC UHF ASK/FSK RECEIVER 20SOIC
Manufacturer
Atmel
Datasheet

Specifications of ATA3741P3-TGQY

Frequency
300MHz ~ 450MHz
Sensitivity
-108dBm
Data Rate - Maximum
10 kBaud
Modulation Or Protocol
ASK, FSK
Applications
RKE, TPM, Security Systems
Current - Receiving
7mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 105°C
Package / Case
20-SOIC (0.300", 7.50mm Width)
Operating Frequency (max)
450000kHz
Operating Temperature (min)
-40C
Operating Temperature (max)
105C
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Memory Size
-
Lead Free Status / Rohs Status
Compliant
Other names
ATA3741P3-TGQYCT
3. RF Front End
4
ATA3741
The RF front end of the receiver is a heterodyne configuration that converts the input signal into
a 1-MHz IF signal. As seen in the block diagram, the front end consists of an LNA (low noise
amplifier), LO (local oscillator), a mixer, and an RF amplifier.
The LO generates the carrier frequency for the mixer via a PLL synthesizer. The XTO (crystal
oscillator) generates the reference frequency f
erates the drive voltage frequency f
is divided by a factor of 64. The divided frequency is compared to f
detector. The current output of the phase frequency detector is connected to a passive loop filter
and thereby generates the control voltage V
is controlled in a way that f
using the following formula:
The XTO is a one-pin oscillator that operates at the series resonance of the quartz crystal. The
crystal should be connected to GND via a capacitor CL according to
capacitor is recommended by the crystal supplier. The value of CL should be optimized for the
individual board layout to achieve the exact value of f
system in terms of receiving bandwidth, the accuracy of the crystal and XTO must be
considered.
Figure 3-1.
The passive loop filter connected to pin LF is designed for a loop bandwidth of B
This value for B
the appropriate loop filter components to achieve the desired loop bandwidth. If the filter compo-
nents are changed for any reason, please note that the maximum capacitive load at pin LF is
limited. If the capacitive load is exceeded, a bit check may no longer be possible since f
not settle before the bit check starts to evaluate the incoming data stream. Therefore, self polling
also will not work .
f
XTO
=
f
------- -
64
LO
PLL Peripherals
Loop
exhibits the best possible noise performance of the LO.
LO
LFGND
LFVCC
DVCC
/ 64 is equal to f
XTO
LF
LO
for the mixer. f
V
V
S
S
LF
XTO
for the VCO. By means of that configuration, V
XTO
C9
R1
. The VCO (voltage-controlled oscillator) gen-
. If f
LO
XTO
LO
is dependent on the voltage at pin LF. f
C
and thereby of f
C10
L
is determined, f
R1 = 820
C9 = 4.7 nF
C10 = 1 nF
XTO
Figure
by the phase frequency
LO
XTO
. When designing the
3-1. The value of the
can be calculated
Figure 3-1
Loop
4899B–RKE–10/06
= 100 kHz.
LO
shows
can-
LO
LF

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